s3c72m9 Samsung Semiconductor, Inc., s3c72m9 Datasheet - Page 301

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s3c72m9

Manufacturer Part Number
s3c72m9
Description
The S3c72m5/s3c72m7/s3c72m9 Single-chip Cmos Microcontroller Has Been Designed For High Performance Using Samsung S
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)
TIMERS and TIMER/COUNTERS
TC1B REFERENCE REGISTER (TREF1B)
The TC1B reference register TREF1B is a 8-bit write-only register that is mapped to RAM locations FABH–FAAH. It
is addressable by 8-bit RAM control instructions. RESET clears the TREF1B value to 'FFH'.
TREF1B is used to store a reference value to be compared to the incrementing TCNT1B register in order to identify
an elapsed time interval. Reference values will differ depending upon the specific function that TC1B is being used to
perform — as a programmable timer/counter, event counter, clock signal divider, or arbitrary frequency output
source.
During timer/counter operation, the value loaded into the reference register compared to the TCNT1B value. When
TCNT1B = TREF1B, the TC1B output latch (TOL2) is inverted and an interrupt request is generated to signal the
interval or event. The TREF1B value, together with the TMOD1B clock frequency selection, determines the specific
TC1B timer interval. Use the following formula to calculate the correct value to load to the TREF1B reference register:
1
TC1B timer interval = (TREF1B value + 1)
TMOD1B frequency setting
(TREF1B value
0)
TC1B OUTPUT LATCH (TOL2)
Bit 3
Bit 2
Bit 1
Bit 0
F92H
TOE1
TOE0
"0"
TOL2
TOL2 is the output latch for timer/counter 1B. When the 8-bit comparator detects a correspondence between the
value of the counter register TCNT1B and the reference value stored in the TREF1B register, the TOL2 logic toggles
high-to-low or low-to-high. Whenever the state of TOL2 is switched, the TC1B signal exits the latch for output.
When timer/counter 1B is started, (TMOD1B.3 = "0"), the contents of the output latch are cleared automatically.
However, when TC1B is disabled (TMOD1B.2 = "0"), the contents of the TOL2 latch are retained and can be read, if
necessary.
11-53

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