s3c72m9 Samsung Semiconductor, Inc., s3c72m9 Datasheet - Page 215
s3c72m9
Manufacturer Part Number
s3c72m9
Description
The S3c72m5/s3c72m7/s3c72m9 Single-chip Cmos Microcontroller Has Been Designed For High Performance Using Samsung S
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.S3C72M9.pdf
(382 pages)
- Current page: 215 of 382
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S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)
IS1, 0 = 0, 1
Reset corresponding IRQx flag
Jump to interrupt start address
Store contents of PC and PSW in the stack area;
set PC contents to corresponding vector address
Yes
Generate corresponding vector interrupt
of shared vector address used?
and release power-down mode
Interrupt is generated (INT xx)
Figure 7-1. Interrupt Execution Flowchart
Request flag (IRQx)
Are both interrupt sources
High-priority interrupt?
Yes
Yes
IS1, 0 = 0, 0?
IS1, 0 = 0, 1?
Yes
Yes
No
IS1, 0 = 1, 0
No
IME = 1?
IEx = 1?
1
No
No
No
No
Retain value until IEx = 1
Retain value until IME= 1
Yes
Verify interrupt source and clear
Jump to interrupt start address
IRQx with a BTSTZ instruction
service routine is completed
IRQx flag value remains 1
Retain value until interrupt
INTERRUPTS
7-3
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