s3c72m9 Samsung Semiconductor, Inc., s3c72m9 Datasheet - Page 139

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s3c72m9

Manufacturer Part Number
s3c72m9
Description
The S3c72m5/s3c72m7/s3c72m9 Single-chip Cmos Microcontroller Has Been Designed For High Performance Using Samsung S
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)
BOR —
BOR
Operation:
Description:
Examples:
1. The carry flag is logically ORed with the P1.0 value:
2. The P1 address is FF1H and register L contains the value 9H (1001B). The address (memb.7–
Bit Logical OR
C,src.b
The specified bit of the source is logically ORed with the carry flag bit value. The value of the source
is unaffected.
C,memb.@L
C,@H+DA.b
C,memb.@L
C,@H+DA.b
C,mema.b
2) is 111100B and (L.3–2) = 10B. The resulting address is 11110010B or FF2H, specifying P2.
The bit value for the BOR instruction, (L.1–0) is 01B which specifies bit 1. Therefore, P1.@L =
P2.1:
C,mema.b
*
Operand
Operand
RCF
BOR
LD
BOR
mema.b
C,P1.0
L,#9H
C,P1.@L
*
Logical-OR carry with specified memory bit
1
1
0
1
0
1
1
1
1
1
1
0
0
1
b1
b1
b1
1
1
0
1
Second Byte
Binary Code
Operation Summary
b0
b0
b0
1
1
0
1
; C
; If P1.0 = "1", then C
; P1.@L is specified as P2.1; C OR P2.1
a5
a3
a3
a3
0
0
0
a4
a2
a2
a2
1
1
1
"0"
a3
a1
a1
a1
1
1
1
a2
a0
a0
a0
0
0
0
C
C
[L.1–0]
C
FB0H–FBFH
FF0H–FFFH
C OR mema.b
C OR [memb.7–2 + L.3–2].
C OR [H + DA.3–0].b
"1"; if P1.0 = "0", then C
Operation Notation
Bit Addresses
SAM47 INSTRUCTION SET
Bytes
2
2
2
Cycles
2
2
2
5-35
"0"

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