s3c72m9 Samsung Semiconductor, Inc., s3c72m9 Datasheet - Page 79
s3c72m9
Manufacturer Part Number
s3c72m9
Description
The S3c72m5/s3c72m7/s3c72m9 Single-chip Cmos Microcontroller Has Been Designed For High Performance Using Samsung S
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.S3C72M9.pdf
(382 pages)
- Current page: 79 of 382
- Download datasheet (2Mb)
S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)
LCON
Bit
Identifier
RESET Value
Read/Write
Bit Addressing
LCON.3
LCON.2
LCON.1
LCON.0
NOTE:
Even though LCON.3 is set to "1", the LCD SEG expand signal (M, LCDFR, CL) is output only if P2.0/M,
P2.1/LCDFR, and P3.0/CL is set to output mode and corresponding output latch is cleared to "0".
— LCD Output Control Register
NOTE: When 1/8 duty is selected, COM8–COM15 are configured as SEG87–SEG80 pins.
Enable/Disable LCD SEG Expand Signal
M Signal Selection Bit
Pin Configuration Bit
LCD Bias Resistor On/Off Bit
0
1
0
1
0
1
0
1
W
.3
3
0
4
Disable LCD SEG expand signal
Enable LCD SEG expand signal (Not available TCLO0 when CL is output.)
M signal for KS0106 (SAMSUNG)
M signal for KS0108 (SAMSUNG)
1/8 duty (COM0–COM7, SEG80–SEG87)
1/16 duty (COM0–COM15)
LCD bias resistors off
LCD bias resistors on
W
.2
2
0
4
W
.1
1
0
4
W
.0
0
0
4
LCD
MEMORY MAP
F8EH
4-25
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