s3c72m9 Samsung Semiconductor, Inc., s3c72m9 Datasheet - Page 250

• Manufacturer Part Number: s3c72m9
• Description: The S3c72m5/s3c72m7/s3c72m9 Single-chip Cmos Microcontroller Has Been Designed For High Performance Using Samsung S
• Manufacturer: Samsung Semiconductor, Inc.

TIMERS and TIMER/COUNTERS
S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)
BASIC TIMER (BT)
OVERVIEW
The 8-bit basic timer (BT) has five functional components:
— Clock selector logic
— 4-bit mode register (BMOD)
— 8-bit counter register (BCNT)
— 8-bit watchdog timer mode register (WDMOD)
— Watchdog timer counter clear flag (WDTCF)
The basic timer generates interrupt requests at precise intervals, based on the frequency of the system clock. You
can use the basic timer as a "watchdog" timer for monitoring system events or use BT output to stabilize clock
RESET
oscillation when stop mode is released by an interrupt and following
. Bit settings in the basic timer mode
register BMOD turns the BT module on and off, selects the input clock frequency, and controls interrupt or
stabilization intervals.
Interval Timer Function
The basic timer's primary function is to measure elapsed time intervals. The standard time interval is equal to 256
basic timer clock pulses.
To restart the basic timer, one bit setting is required: bit 3 of the mode register BMOD should be set to logic one.
The input clock frequency and the interrupt and stabilization interval are selected by loading the appropriate bit
values to BMOD.2–BMOD.0.
The 8-bit counter register, BCNT, is incremented each time a clock signal is detected that corresponds to the
frequency selected by BMOD. BCNT continues incrementing as it counts BT clocks until an overflow occurs ( 255).
An overflow causes the BT interrupt request flag (IRQB) to be set to logic one to signal that the designated time
interval has elapsed. An interrupt request is than generated, BCNT is cleared to logic zero, and counting continues
from 00H.
Watchdog Timer Function
The basic timer can also be used as a "watchdog" timer to signal the occurrence of system or program operation
error. For this purpose, instruction that clear the watchdog timer (BITS WDTCF) should be executed at proper points
in a program within given period. If an instruction that clears the watchdog timer is not executed within the given
period and the watchdog timer overflows, reset signal is generated and the system restarts with reset status. An
operation of watchdog timer is as follows:
— Write some values (except #5AH) to watchdog timer mode register, WDMOD
— If WDCNT overflows, system reset is generated.
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