s3c72m9 Samsung Semiconductor, Inc., s3c72m9 Datasheet - Page 19

• Manufacturer Part Number: s3c72m9
• Description: The S3c72m5/s3c72m7/s3c72m9 Single-chip Cmos Microcontroller Has Been Designed For High Performance Using Samsung S
• Manufacturer: Samsung Semiconductor, Inc.

S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)
F
The following examples show you several ways you can define the vectored interrupt and instruction reference areas
in program memory:
1. When all vector interrupts are used:
;
2. When a specific vectored interrupt such as INT0, and INTT0 is not used, the unused vector interrupt locations
;
;
;
;
must be skipped with the assembly instruction ORG so that jumps will address the correct locations:
PROGRAMMING TIP — Defining Vectored Interrupts
ORG
VENT0
VENT1
VENT2
VENT3
VENT4
VENT5
VENT6
VENT7
ORG
VENT0
VENT1
ORG
VENT3
VENT4
ORG
VENT6
VENT7
ORG
0000H
1,0,RESET
0,0,INTB
0,0,INT0
0,0,INT1
0,0,INTS
0,0,INTT0
0,0,INTT1
0,0,INTK
0000H
1,0,RESET
0,0,INTB
0006H
0,0,INT1
0,0,INTS
000CH
0,0,INTT1
0,0,INTK
0010H
; EMB
; EMB
; EMB
; EMB
; EMB
; EMB
; EMB
; EMB
; EMB
; EMB
; INT0 interrupt not used
; EMB
; EMB
; INTT0 interrupt not used
; EMB
; EMB
0, ERB
0, ERB
0, ERB
1, ERB
1, ERB
0, ERB
0, ERB
0, ERB
0, ERB
0, ERB
0, ERB
0, ERB
0, ERB
0, ERB
0; Jump to RESET address
0; Jump to INTK address
0; Jump to INTS address
0; Jump to INTT0 address
0; Jump to INTT1 address
0; Jump to INTB address
0; Jump to INTS address
0; Jump to INTT1 address
0; Jump to RESET address
0; Jump to INTB address
0; Jump to INT0 address
0; Jump to INT1 address
0; Jump to INT1 address
0; Jump to INTK address
ADDRESS SPACES
2-3