s3c72m9 Samsung Semiconductor, Inc., s3c72m9 Datasheet - Page 196
![no-image](/images/no-image-200.jpg)
s3c72m9
Manufacturer Part Number
s3c72m9
Description
The S3c72m5/s3c72m7/s3c72m9 Single-chip Cmos Microcontroller Has Been Designed For High Performance Using Samsung S
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.S3C72M9.pdf
(382 pages)
- Current page: 196 of 382
- Download datasheet (2Mb)
SAM47 INSTRUCTION SET
XCH —
XCH
Operation:
Description:
Example:
5-92
Exchange A or EA with Nibble or Byte
dst,src
The instruction XCH loads the accumulator with the contents of the indicated destination variable
and writes the original contents of the accumulator to the source.
Double register HL contains the address 20H. The accumulator contains the value 3FH (00111111B)
and internal RAM location 20H the value 75H (01110101B). The instruction
XCH
leaves RAM location 20H with the value 3FH (00111111B) and the extended accumulator with the
value 75H (01110101B).
Operand
Operand
A,@RRa
EA,@HL
A,@RRa
EA,@HL
EA,RRb
EA,RRb
EA,DA
EA,DA
A,DA
A,Ra
A,DA
A,Ra
EA,@HL
Exchange A and data memory contents
Exchange A and register (Ra) contents
Exchange A and indirect data memory
Exchange EA and direct data memory contents
Exchange EA and register pair (RRb) contents
Exchange EA and indirect data memory contents
a7
a7
0
0
0
1
1
1
1
0
a6
a6
1
1
1
1
1
1
1
0
a5
a5
1
1
1
0
0
1
0
0
Binary Code
Operation Summary
a4
a4
1
0
1
0
1
0
1
0
a3
a3
1
1
1
1
1
0
1
0
a2
a2
r2
i2
r2
0
1
1
1
0
S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)
a1
a1
r1
i1
r1
0
1
0
0
0
a0
a0
r0
i0
1
1
0
0
0
1
A
A
A
A
EA
A
(RRa)
DA
Ra
DA, E
(HL), E
RRb
Operation Notation
DA + 1
Bytes
(HL + 1)
2
1
1
2
2
2
Cycles
2
1
1
2
2
2
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