s3c72m9 Samsung Semiconductor, Inc., s3c72m9 Datasheet - Page 264

• Manufacturer Part Number: s3c72m9
• Description: The S3c72m5/s3c72m7/s3c72m9 Single-chip Cmos Microcontroller Has Been Designed For High Performance Using Samsung S
• Manufacturer: Samsung Semiconductor, Inc.

TIMERS and TIMER/COUNTERS
TC0 EXTERNAL INPUT SIGNAL DIVIDER
By selecting an external clock source and loading a reference value into the TC0 reference register, TREF0, you can
divide the incoming clock signal by the TREF0 value and then output this modified clock frequency to the TCLO0 pin.
The sequence of operations used to divide external clock input can be summarized as follows:
1. Load a signal divider value to the TREF0 register.
2. Clear TMOD0.6 to "0" to enable external clock input at the TCL0 pin.
3. Set TMOD0.5 and TMOD0.4 to desired TCL0 signal edge detection.
4. Set port 3.0 mode flag (PM3.0) to output ("1").
5. Set P3.0 output latch to "0".
6. Set TOE0 flag to "1" to enable output of the divided frequency to the TCLO0 pin
F
Output external TCL0 clock pulse to the TCLO0 pin (divided by four):
11-16
PROGRAMMING TIP — External TCL0 Clock Output to the TCLO0 Pin
External (TCL0)
BITS
SMB
LD
LD
LD
LD
LD
LD
BITR
BITS
Output Pulse
Clock Pulse
TCLO0
EMB
15
EA,#01H
TREF0,EA
EA,#0CH
TMOD0,EA
EA,#01H
PMG2,EA
P3.0
TOE0
; P3.0
; P3.0 clear
S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)
output mode