s3c72m9 Samsung Semiconductor, Inc., s3c72m9 Datasheet - Page 76

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s3c72m9

Manufacturer Part Number
s3c72m9
Description
The S3c72m5/s3c72m7/s3c72m9 Single-chip Cmos Microcontroller Has Been Designed For High Performance Using Samsung S
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
MEMORY MAP
IMODK
Bit
Identifier
RESET Value
Read/Write
Bit Addressing
IMODK.3
IMODK.2
IMODK.1–.0
NOTES:
1.
2.
3.
4-22
To generate a key interrupt, the selected pins must be configured to input mode.
If any one of key interrupt pins selected by IMODK register is configured as output mode, only falling edge can be
detected.
To generate a key interrupt, first, configure pull-up resistors or external pull-down resistors. And then, select edge
detection and pins by setting IMODK register.
— External Key Interrupt Mode Register
Bit 3
External Key Interrupt Edge Detection Selection Bit
External Key Interrupt Mode Control Bits
0
0
1
0
0
1
1
"0"
W
3
0
4
Always logic zero
Falling edge detection
Rising edge detection
0
1
0
1
Disable key interrupt
Enable edge detection at K0–K3 pins
Enable edge detection at K4–K7 pins
Enable edge detection at K0–K7 pins
IMODK.2
W
2
0
4
IMODK.1
W
1
0
4
IMODK.0
W
0
0
4
S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)
CPU
FB6H

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