s3c72m9 Samsung Semiconductor, Inc., s3c72m9 Datasheet - Page 132

• Manufacturer Part Number: s3c72m9
• Description: The S3c72m5/s3c72m7/s3c72m9 Single-chip Cmos Microcontroller Has Been Designed For High Performance Using Samsung S
• Manufacturer: Samsung Semiconductor, Inc.

SAM47 INSTRUCTION SET
AND —
AND
Operation:
Description:
Example:
5-28
If the extended accumulator contains the value 0C3H (11000011B) and register pair HL the value 55H
(01010101B), the instruction
AND
leaves the value 41H (01000001B) in the extended accumulator EA .
Logical AND
dst,src
The source operand is logically ANDed with the destination operand. The result is stored in the
destination. The logical AND operation results in a "1" bit being stored whenever the corresponding
bits in the two operands are both "1"; otherwise a "0" bit is stored. The contents of the source are
unaffected.
Operand
Operand
RRb,EA
RRb,EA
A,@HL
EA,RR
A,@HL
EA,RR
A,#im
A,#im
EA,HL
Logical-AND A immediate data to A
Logical-AND A indirect data memory to A
Logical-AND register pair (RR) to EA
Logical-AND EA to register pair (RRb)
1
0
0
1
0
1
0
1
0
0
1
0
1
0
0
0
1
0
0
0
0
Binary Code
Operation Summary
1
1
1
1
1
1
1
d3
1
1
1
1
1
0
d2
r2
r2
1
0
1
1
S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)
d1
r1
r1
0
0
0
0
d0
1
1
0
0
0
0
A
A
EA
RRb
A AND im
A AND (HL)
EA AND RR
Operation Notation
RRb AND EA
Bytes
2
1
2
2
Cycles
2
1
2
2