C8051F34A-GMR Silicon Labs, C8051F34A-GMR Datasheet - Page 139

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C8051F34A-GMR

Manufacturer Part Number
C8051F34A-GMR
Description
8-bit Microcontrollers - MCU 48 MIPS 64KB 10ADC
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051F34A-GMR

Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
14.5. System and USB Clock Selection
The internal oscillator requires little start-up time and may be selected as the system or USB clock immedi-
ately following the OSCICN write that enables the internal oscillator. External crystals and ceramic resona-
tors typically require a start-up time before they are settled and ready for use. The Crystal Valid Flag
(XTLVLD in register OSCXCN) is set to ‘1’ by hardware when the external oscillator is settled. To avoid
reading a false XTLVLD, in crystal mode software should delay at least 1 ms between enabling the
external oscillator and checking XTLVLD. RC and C modes typically require no startup time.
14.5.1. System Clock Selection
The CLKSL[1:0] bits in register CLKSEL select which oscillator source is used as the system clock.
CLKSL[1:0] must be set to 01b for the system clock to run from the external oscillator; however the exter-
nal oscillator may still clock certain peripherals (timers, PCA, USB) when the internal oscillator is selected
as the system clock. The system clock may be switched on-the-fly between the internal oscillator, external
oscillator, and 4x Clock Multiplier so long as the selected oscillator is enabled and has settled. C8051F340/
1/2/3 devices can use the 48 MHz Clock Multiplier output as system clock. See Table 3.1, “Global DC Elec-
trical Characteristics,” on page 25 for system clock frequency specifications. When operating with a sys-
tem clock of greater than 25 MHz (up to 48 MHz), the FLRT bit (FLSCL.4) should be set to ‘1’. See
Section “10. Prefetch Engine” on page 99
14.5.2. USB Clock Selection
The USBCLK[2:0] bits in register CLKSEL select which oscillator source is used as the USB clock. The
USB clock may be derived from the 4x Clock Multiplier output, a divided version of the internal oscillator, or
a divided version of the external oscillator. Note that the USB clock must be 48 MHz when operating USB0
as a Full Speed Function; the USB clock must be 6 MHz when operating USB0 as a Low Speed Function.
See SFR Definition 14.6 for USB clock selection options.
Some example USB clock configurations for Full and Low Speed mode are given below:
USB Clock
Clock Multiplier Input
Internal Oscillator
USB Clock
Clock Multiplier Input
External Oscillator
*Note: Clock Recovery must be enabled for this configuration.
USB Clock
Internal Oscillator
Clock Signal
Clock Signal
Clock Signal
Clock Signal
Clock Multiplier
Internal Oscillator*
Divide by 1
Clock Multiplier
External Oscillator
Crystal Oscillator Mode
12 MHz Crystal
Internal Oscillator / 2
Divide by 1
Input Source Selection
Input Source Selection
Input Source Selection
Input Source Selection
C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
External Oscillator
External Oscillator
Internal Oscillator
Internal Oscillator
for more details.
Rev. 1.3
USBCLK = 000b
MULSEL = 00b
IFCN = 11b
USBCLK = 000b
MULSEL = 01b
XOSCMD = 110b
XFCN = 111b
USBCLK = 001b
IFCN = 11b
Register Bit Settings
Register Bit Settings
Register Bit Settings
Register Bit Settings
139

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