C8051F34A-GMR Silicon Labs, C8051F34A-GMR Datasheet - Page 240

• Manufacturer Part Number: C8051F34A-GMR
• Description: 8-bit Microcontrollers - MCU 48 MIPS 64KB 10ADC
• Manufacturer: Silicon Labs

Specifications of C8051F34A-GMR

• Rohs: yes
• Core: 8051
• Processor Series: C8051
• Data Bus Width: 8 bit

C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
240
Bit7:
Bit6:
Bits5–4: T1M1–T1M0: Timer 1 Mode Select.
Bit3:
Bit2:
Bits1–0: T0M1–T0M0: Timer 0 Mode Select.
GATE1
R/W
Bit7
GATE1: Timer 1 Gate Control.
0: Timer 1 enabled when TR1 = 1 irrespective of INT1 logic level.
1: Timer 1 enabled only when TR1 = 1 AND INT1 is active as defined by bit IN1PL in register
INT01CF (see SFR Definition 9.13).
C/T1: Counter/Timer 1 Select.
0: Timer Function: Timer 1 incremented by clock defined by T1M bit (CKCON.3).
1: Counter Function: Timer 1 incremented by high-to-low transitions on external input pin
(T1).
These bits select the Timer 1 operation mode.
GATE0: Timer 0 Gate Control.
0: Timer 0 enabled when TR0 = 1 irrespective of INT0 logic level.
1: Timer 0 enabled only when TR0 = 1 AND INT0 is active as defined by bit IN0PL in register
INT01CF (see SFR Definition 9.13).
C/T0: Counter/Timer Select.
0: Timer Function: Timer 0 incremented by clock defined by T0M bit (CKCON.2).
1: Counter Function: Timer 0 incremented by high-to-low transitions on external input pin
(T0).
These bits select the Timer 0 operation mode.
T1M1
T0M1
C/T1
0
0
1
1
0
0
1
1
R/W
Bit6
T1M0
T0M0
0
1
0
1
0
1
0
1
SFR Definition 21.2. TMOD: Timer Mode
T1M1
R/W
Bit5
Mode 3: Two 8-bit counter/timers
Mode 2: 8-bit counter/timer with
Mode 2: 8-bit counter/timer with
T1M0
Mode 0: 13-bit counter/timer
Mode 1: 16-bit counter/timer
Mode 0: 13-bit counter/timer
Mode 1: 16-bit counter/timer
R/W
Bit4
Mode 3: Timer 1 inactive
auto-reload
auto-reload
Rev. 1.3
GATE0
Mode
Mode
R/W
Bit3
C/T0
R/W
Bit2
T0M1
R/W
Bit1
T0M0
R/W
Bit0
SFR Address:
00000000
Reset Value
0x89