C8051F34A-GMR Silicon Labs, C8051F34A-GMR Datasheet - Page 214

• Manufacturer Part Number: C8051F34A-GMR
• Description: 8-bit Microcontrollers - MCU 48 MIPS 64KB 10ADC
• Manufacturer: Silicon Labs

Specifications of C8051F34A-GMR

• Rohs: yes
• Core: 8051
• Processor Series: C8051
• Data Bus Width: 8 bit

C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
19.1. Baud Rate Generator
The UART1 baud rate is generated by a dedicated 16-bit timer which runs from the controller’s core clock
(SYSCLK), and has prescaler options of 1, 4, 12, or 48. The timer and prescaler options combined allow
for a wide selection of baud rates over many SYSCLK frequencies.
The baud rate generator is configured using three registers: SBCON1, SBRLH1, and SBRLL1. The
UART1 Baud Rate Generator Control Register (SBCON1, SFR Definition 19.4) enables or disables the
baud rate generator, and selects the prescaler value for the timer. The baud rate generator must be
enabled for UART1 to function. Registers SBRLH1 and SBRLL1 contain a 16-bit reload value for the dedi-
cated 16-bit timer. The internal timer counts up from the reload value on every clock tick. On timer over-
flows (0xFFFF to 0x0000), the timer is reloaded. For reliable UART operation, it is recommended that the
UART baud rate is not configured for baud rates faster than SYSCLK/16. The baud rate for UART1 is
defined in Equation 19.1.
A quick reference for typical baud rates and system clock frequencies is given in Table 19.1.
214
Target Baud
Rate (bps)
230400
115200
230400
115200
230400
115200
57600
28800
14400
57600
28800
14400
57600
28800
14400
9600
2400
1200
9600
2400
1200
9600
2400
1200
Table 19.1. Baud Rate Generator Settings for Standard Baud Rates
Baud Rate
Actual Baud
Rate (bps)
230769
115385
230769
115385
230769
115385
57692
28846
14388
57692
28777
14406
57554
28812
14397
9600
2400
1200
9600
2400
1200
9600
2400
1200
Equation 19.1. UART1 Baud Rate
=
-------------------------------------------------------------------------- -

65536 (SBRLH1:SBRLL1)
Baud Rate
0.16%
0.16%
0.16%
0.16%
0.08%
0.16%
0.16%
0.16%
0.08%
0.04%
0.16%
0.16%
0.08%
0.04%
0.02%
Error
0.0%
0.0%
0.0%
0.0%
0.0%
0.0%
0.0%
0.0%
0.0%
–
SYSCLK
Rev. 1.3
Oscillator
Factor
Divide
10000
10000
20000
20000
40000
1250
5000
1666
2500
1666
3334
5000
104
208
416
834
104
208
416
834
416
834
208
52
(Prescaler Bits)

SB1PS[1:0]

1
-- -
2
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11

--------------------- -
Prescaler
1
SBRLH1:SBRLL1
Reload Value in
0xFFCC
0xFFCC
0xFCBF
0xFCBF
0xFFE6
0xFE5F
0xFD8F
0xF63C
0xEC78
0xFE5F
0xFB1E
0xEC78
0xD8F0
0xFE5F
0xF97D
0xF63C
0xD8F0
0xB1E0
0xFF98
0xFF30
0xFF98
0xFF30
0xFF98
0xFF30