C8051F34A-GMR Silicon Labs, C8051F34A-GMR Datasheet - Page 156

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C8051F34A-GMR

Manufacturer Part Number
C8051F34A-GMR
Description
8-bit Microcontrollers - MCU 48 MIPS 64KB 10ADC
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051F34A-GMR

Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
156
Bits7–0: P3SKIP[3:0]: Port3 Crossbar Skip Enable Bits.
Note: P3.1–3.7 are only available on 48-pin devices.
Bits7–0: P4.[7:0]
Note: P4 is only available on 48-pin devices.
P4.7
R/W
R/W
Bit7
Bit7
These bits select Port pins to be skipped by the Crossbar Decoder. Port pins used as ana-
log inputs (for ADC or Comparator) or used as special functions (VREF input, external oscil-
lator circuit, CNVSTR input) should be skipped by the Crossbar.
0: Corresponding P3.n pin is not skipped by the Crossbar.
1: Corresponding P3.n pin is skipped by the Crossbar.
Write - Output appears on I/O pins.
0: Logic Low Output.
1: Logic High Output (high impedance if corresponding P4MDOUT.n bit = 0).
Read - Always reads ‘0’ if selected as analog input in register P4MDIN. Directly reads Port
pin when configured as digital input.
0: P4.n pin is logic low.
1: P4.n pin is logic high.
P4.6
R/W
R/W
Bit6
Bit6
SFR Definition 15.19. P3SKIP: Port3 Skip
P4.5
R/W
R/W
Bit5
Bit5
SFR Definition 15.20. P4: Port4 Latch
P4.4
R/W
R/W
Bit4
Bit4
Rev. 1.3
P4.3
R/W
R/W
Bit3
Bit3
P4.2
R/W
R/W
Bit2
Bit2
P4.1
R/W
R/W
Bit1
Bit1
P4.0
R/W
R/W
Bit0
Bit0
SFR Address:
SFR Address:
00000000
Reset Value
Reset Value
11111111
0xDF
0xC7

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