C8051F34A-GMR Silicon Labs, C8051F34A-GMR Datasheet - Page 87

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C8051F34A-GMR

Manufacturer Part Number
C8051F34A-GMR
Description
8-bit Microcontrollers - MCU 48 MIPS 64KB 10ADC
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051F34A-GMR

Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
Bit7:
Bit6:
Bit5:
Bits4–3: RS1–RS0: Register Bank Select.
Bit2:
Bit1:
Bit0:
Bits7–0: ACC: Accumulator.
ACC.7
R/W
R/W
CY
Bit7
Bit7
CY: Carry Flag.
This bit is set when the last arithmetic operation resulted in a carry (addition) or a borrow
(subtraction). It is cleared to logic 0 by all other arithmetic operations.
AC: Auxiliary Carry Flag
This bit is set when the last arithmetic operation resulted in a carry into (addition) or a borrow
from (subtraction) the high order nibble. It is cleared to logic 0 by all other arithmetic operations.
F0: User Flag 0.
This is a bit-addressable, general purpose flag for use under software control.
These bits select which register bank is used during register accesses.
OV: Overflow Flag.
This bit is set to 1 under the following circumstances:
• An ADD, ADDC, or SUBB instruction causes a sign-change overflow.
• A MUL instruction results in an overflow (result is greater than 255).
• A DIV instruction causes a divide-by-zero condition.
The OV bit is cleared to 0 by the ADD, ADDC, SUBB, MUL, and DIV instructions in all other
cases.
F1: User Flag 1.
This is a bit-addressable, general purpose flag for use under software control.
PARITY: Parity Flag.
This bit is set to logic 1 if the sum of the eight bits in the accumulator is odd and cleared if the
sum is even.
This register is the accumulator for arithmetic operations.
RS1
ACC.6
0
0
1
1
R/W
R/W
AC
Bit6
Bit6
SFR Definition 9.4. PSW: Program Status Word
RS0
0
1
0
1
ACC.5
SFR Definition 9.5. ACC: Accumulator
R/W
R/W
Bit5
Bit5
F0
C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
Register Bank
ACC.4
RS1
R/W
R/W
Bit4
0
1
2
3
Bit4
Rev. 1.3
ACC.3
RS0
R/W
R/W
Bit3
Bit3
0x00 - 0x07
0x08 - 0x0F
0x10 - 0x17
0x18 - 0x1F
Address
ACC.2
R/W
R/W
OV
Bit2
Bit2
ACC.1
R/W
R/W
Bit1
Bit1
F1
(bit addressable)
(bit addressable)
PARITY
ACC.0
R/W
Bit0
Bit0
R
SFR Address:
SFR Address:
00000000
00000000
Reset Value
Reset Value
0xE0
0xD0
87

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