C8051F34A-GMR Silicon Labs, C8051F34A-GMR Datasheet - Page 149

• Manufacturer Part Number: C8051F34A-GMR
• Description: 8-bit Microcontrollers - MCU 48 MIPS 64KB 10ADC
• Manufacturer: Silicon Labs

Specifications of C8051F34A-GMR

• Rohs: yes
• Core: 8051
• Processor Series: C8051
• Data Bus Width: 8 bit

Bit7:
Bit6:
Bit5:
Bit4:
Bit3:
Bits2–0: PCA0ME: PCA Module I/O Enable Bits.
Bits7–1: RESERVED: Always write to 0000000b
Bit0:
WEAKPUD XBARE
R/W
R/W
Bit7
Bit7
WEAKPUD: Port I/O Weak Pull-up Disable.
0: Weak Pull-ups enabled (except for Ports whose I/O are configured as analog input or
push-pull output).
1: Weak Pull-ups disabled.
XBARE: Crossbar Enable.
0: Crossbar disabled; all Port drivers disabled.
1: Crossbar enabled.
T1E: T1 Enable
0: T1 unavailable at Port pin.
1: T1 routed to Port pin.
T0E: T0 Enable
0: T0 unavailable at Port pin.
1: T0 routed to Port pin.
ECIE: PCA0 External Counter Input Enable
0: ECI unavailable at Port pin.
1: ECI routed to Port pin.
000: All PCA I/O unavailable at Port pins.
001: CEX0 routed to Port pin.
010: CEX0, CEX1 routed to Port pins.
011: CEX0, CEX1, CEX2 routed to Port pins.
100: CEX0, CEX1, CEX2, CEX3 routed to Port pins.
101: CEX0, CEX1, CEX2, CEX3, CEX4 routed to Port pins.
110: Reserved.
111: Reserved.
URT1E: UART1 I/O Output Enable (C8051F340/1/4/5/8/A/B Only)
0: UART1 I/O unavailable at Port pins.
1: UART1 TX1, RX1 routed to Port pins.
SFR Definition 15.2. XBR1: Port I/O Crossbar Register 1
SFR Definition 15.3. XBR2: Port I/O Crossbar Register 2
R/W
R/W
Bit6
Bit6
T1E
R/W
R/W
Bit5
Bit5
C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
T0E
R/W
R/W
Bit4
Bit4
Rev. 1.3
ECIE
R/W
R/W
Bit3
Bit3
R/W
R/W
Bit2
Bit2
PCA0ME
R/W
R/W
Bit1
Bit1
URT1E
R/W
R/W
Bit0
Bit0
SFR Address:
SFR Address:
00000000
00000000
Reset Value
Reset Value
0xE2
0xE3
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