C8051F34A-GMR Silicon Labs, C8051F34A-GMR Datasheet - Page 145

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C8051F34A-GMR

Manufacturer Part Number
C8051F34A-GMR
Description
8-bit Microcontrollers - MCU 48 MIPS 64KB 10ADC
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051F34A-GMR

Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
SF Signals
(32-pin
Package)
SF Signals
(48-pin
Package)
PIN I/O
TX0
RX0
SCK
MISO
MOSI
NSS*
SDA
SCL
CP0
CP0A
CP1
CP1A
SYSCLK
CEX0
CEX1
CEX2
CEX3
CEX4
ECI
T0
T1
TX1**
RX1**
SF Signals
Port pin assigned to peripheral by the Crossbar
Special Function Signals are not assigned by the Crossbar. When these signals are
0
0
Figure 15.4. Crossbar Priority Decoder in Example Configuration
1
0
2
0
P0SKIP[0:7]
3
0
P0
4
0
*NSS is only pinned out in 4-wire SPI mode
5
0
6
0
C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
7
0
0
0
1
0
2
0
P1SKIP[0:7]
(No Pins Skipped)
3
0
P1
4
0
Rev. 1.3
5
0
6
0
7
0
0
0
**UART1 available only on C8051F340/1/4/5/8/A/B devices
1
0
2
0
P2SKIP[0:7]
3
0
P2
4
0
5
0
6
0
7
0
Example:
0
0
1
0
P3.1-P3.7 unavailable on
the 32-pin packages
2
0
P3SKIP[0:7]
XBR0 = 0x07
XBR1 = 0x43
3
0
P3
4
0
5
0
6
0
7
0
145

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