C8051F34A-GMR Silicon Labs, C8051F34A-GMR Datasheet - Page 80

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C8051F34A-GMR

Manufacturer Part Number
C8051F34A-GMR
Description
8-bit Microcontrollers - MCU 48 MIPS 64KB 10ADC
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051F34A-GMR

Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
9.2.1. Program Memory
The CIP-51 core has a 64k-byte program memory space. The C8051F34x implements 64k or 32k bytes of
this program memory space as in-system, re-programmable Flash memory. Note that on the 64k versions
of the C8051F34x, addresses above 0xFBFF are reserved.
Program memory is normally assumed to be read-only. However, the CIP-51 can write to program memory
by setting the Program Store Write Enable bit (PSCTL.0) and using the MOVX instruction. This feature pro-
vides a mechanism for the CIP-51 to update program code and use the program memory space for
non-volatile data storage. Refer to
80
0x7FFF
0x0000
PROGRAM/DATA MEMORY
Programmable in 512
Byte Sectors)
(In-System
(FLASH)
FLASH
Figure 9.3. On-Chip Memory Map for 32 kB Devices
Section “12. Flash Memory” on page 107
0xFFFF
0x07FF
0x0800
0x0000
0xFF
0x80
0x7F
0x30
0x2F
0x20
0x1F
0x00
XRAM - 2048 Bytes
(Available only on devices
(Accessable using MOVX
(Indirect Addressing
(Direct and Indirect
Off-Chip XRAM
Rev. 1.3
INTERNAL DATA ADDRESS SPACE
EXTERNAL DATA ADDRESS SPACE
General Purpose
Upper 128 RAM
Bit Addressable
Addressing)
instruction)
Registers
with EMIF)
Only)
DATA MEMORY (RAM)
(Direct Addressing Only)
Special Function
Lower 128 RAM
(Direct and Indirect
Addressing)
Register's
USB FIFOs
1024 Bytes
for further details.
0x07FF
0x0400

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