C8051F34A-GMR Silicon Labs, C8051F34A-GMR Datasheet - Page 140

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C8051F34A-GMR

Manufacturer Part Number
C8051F34A-GMR
Description
8-bit Microcontrollers - MCU 48 MIPS 64KB 10ADC
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051F34A-GMR

Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
140
USB Clock
External Oscillator
Bit 7:
Bits6–4: USBCLK2–0: USB Clock Select
Bit3:
Bits2–0: CLKSL2–0: System Clock Select
R/W
Bit7
Clock Signal
-
Unused. Read = 0b; Write = don’t care.
These bits select the clock supplied to USB0. When operating USB0 in full-speed mode, the
selected clock should be 48 MHz. When operating USB0 in low-speed mode, the selected
clock should be 6 MHz.
Unused. Read = 0b; Write = don’t care.
These bits select the system clock source. When operating from a system clock of 25 MHz
or less, the FLRT bit should be set to ‘0’. When operating with a system clock of greater than
25 MHz (up to 48 MHz), the FLRT bit (FLSCL.4) should be set to ‘1’. See
“10. Prefetch Engine” on page 99
*Note: This option is only available on 48 MHz devices.
R/W
Bit6
USBCLK
101-111
CLKSL
011*
000
001
010
100
101
000
001
010
100
011
110
111
SFR Definition 14.6. CLKSEL: Clock Select
USBCLK
External Oscillator / 4
Crystal Oscillator Mode
24 MHz Crystal
R/W
Bit5
Input Source Selection
Internal Oscillator
R/W
Bit4
Internal Oscillator (as determined by the
IFCN bits in register OSCICN)
for more details.
Rev. 1.3
Low-Frequency Oscillator
R/W
Bit3
External Oscillator / 2
External Oscillator / 3
External Oscillator / 4
4x Clock Multiplier / 2
Internal Oscillator / 2
4x Clock Multiplier*
-
4x Clock Multiplier
External Oscillator
External Oscillator
Selected Clock
Selected Clock
RESERVED
RESERVED
RESERVED
USBCLK = 101b
XOSCMD = 110b
XFCN = 111b
Register Bit Settings
R/W
Bit2
CLKSL
R/W
Bit1
R/W
Bit0
Section
SFR Address
00000000
Reset Value
0xA9

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