C8051F34A-GMR Silicon Labs, C8051F34A-GMR Datasheet - Page 164

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C8051F34A-GMR

Manufacturer Part Number
C8051F34A-GMR
Description
8-bit Microcontrollers - MCU 48 MIPS 64KB 10ADC
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051F34A-GMR

Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
164
R/W
Bit7
This SFR is used to indirectly read and write USB0 registers.
Write Procedure:
1. Poll for BUSY (USB 0ADR.7) => ‘0’.
2. Load the target USB0 register address into the USBADDR bits in register USB0ADR.
3. Write data to USB0DAT.
4. Repeat (Step 2 may be skipped when writing to the same USB0 register).
Read Procedure:
1. Poll for BUSY (USB 0ADR.7) => ‘0’.
2. Load the target USB0 register address into the USBADDR bits in register USB0ADR.
3. Write ‘1’ to the BUSY bit in register USB0ADR (steps 2 and 3 can be performed in the
4. Poll for BUSY (USB 0ADR.7) => ‘0’.
5. Read data from USB0DAT.
6. Repeat from Step 2 (Step 2 may be skipped when reading the same USB0 register; Step 3
same write).
may be skipped when the AUTORD bit (USB0ADR.6) is logic 1).
R/W
Bit6
SFR Definition 16.3. USB0DAT: USB0 Data
R/W
Bit5
R/W
Bit4
USB0DAT
Rev. 1.3
R/W
Bit3
R/W
Bit2
R/W
Bit1
R/W
Bit0
SFR Address:
00000000
Reset Value
0x97

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