C8051F34A-GMR Silicon Labs, C8051F34A-GMR Datasheet - Page 46

• Manufacturer Part Number: C8051F34A-GMR
• Description: 8-bit Microcontrollers - MCU 48 MIPS 64KB 10ADC
• Manufacturer: Silicon Labs

Specifications of C8051F34A-GMR

• Rohs: yes
• Core: 8051
• Processor Series: C8051
• Data Bus Width: 8 bit

C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
5.3.2. Tracking Modes
The AD0TM bit in register ADC0CN controls the ADC0 track-and-hold mode. In its default state, the ADC0
input is continuously tracked, except when a conversion is in progress. When the AD0TM bit is logic 1,
ADC0 operates in low-power track-and-hold mode. In this mode, each conversion is preceded by a track-
ing period of 3 SAR clocks (after the start-of-conversion signal). When the CNVSTR signal is used to initi-
ate conversions in low-power tracking mode, ADC0 tracks only when CNVSTR is low; conversion begins
on the rising edge of CNVSTR (see Figure 5.4). Tracking can also be disabled (shutdown) when the device
is in low power standby or sleep modes. Low-power track-and-hold mode is also useful when AMUX set-
tings are frequently changed, due to the settling time requirements described in
Time Requirements” on page
46
(AD0CM[2:0]=000, 001,010
Timer 1, Timer 3 Overflow
Write '1' to AD0BUSY,
(AD0CM[2:0]=100)
Timer 0, Timer 2,
Figure 5.4. 10-Bit ADC Track and Conversion Example Timing
SAR Clocks
SAR Clocks
SAR Clocks
AD0TM=1
AD0TM=0
011, 101)
AD0TM=1
AD0TM=0
CNVSTR
47.
Low Power
or Convert
Low Power
or Convert
Track or
Convert
A. ADC0 Timing for External Trigger Source
Track or Convert
B. ADC0 Timing for Internal Trigger Source
1
1
Track
2
2
Track
Rev. 1.3
3
3
4
4
1
Convert
5
5
2
6
6
3
7
7
4
8
Convert
8
Convert
Convert
5
9
9
6
10 11 12
10 11
7
8
9
13 14
Section “5.3.3. Settling
10 11
Low Power Mode
Track
Low Power
Mode
Track