C8051F34A-GMR Silicon Labs, C8051F34A-GMR Datasheet - Page 205

• Manufacturer Part Number: C8051F34A-GMR
• Description: 8-bit Microcontrollers - MCU 48 MIPS 64KB 10ADC
• Manufacturer: Silicon Labs

Specifications of C8051F34A-GMR

• Rohs: yes
• Core: 8051
• Processor Series: C8051
• Data Bus Width: 8 bit

18. UART0
UART0 is an asynchronous, full duplex serial port offering modes 1 and 3 of the standard 8051 UART.
Enhanced baud rate support allows a wide range of clock sources to generate standard baud rates (details
in
UART0 to start reception of a second incoming data byte before software has finished reading the previous
data byte.
UART0 has two associated SFRs: Serial Control Register 0 (SCON0) and Serial Data Buffer 0 (SBUF0).
The single SBUF0 location provides access to both transmit and receive registers. Writes to SBUF0
always access the Transmit register. Reads of SBUF0 always access the buffered Receive register;
it is not possible to read data from the Transmit register.
With UART0 interrupts enabled, an interrupt is generated each time a transmit is completed (TI0 is set in
SCON0), or a data byte has been received (RI0 is set in SCON0). The UART0 interrupt flags are not
cleared by hardware when the CPU vectors to the interrupt service routine. They must be cleared manually
by software, allowing software to determine the cause of the UART0 interrupt (transmit complete or receive
complete).
Section “18.1. Enhanced Baud Rate Generation” on page 206
Rate Generator
UART0 Baud
Write to
SBUF0
C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
Figure 18.1. UART0 Block Diagram
Rx Clock
Start
Tx Clock
Start
Stop Bit
SBUF0
Read
SCON
TB80
D
SET
CLR
Shift
Input Shift Register
Q
Shift
SFR Bus
(RX Latch)
SBUF0
Tx Control
Rx Control
(9 bits)
0x1FF
SFR Bus
Zero Detector
(TX Shift)
SBUF0
RB80
Load SBUF0
Rev. 1.3
Tx IRQ
Rx IRQ
RI0
TI0
SBUF0
Load
Data
Send
Interrupt
Serial
Port
RX0
TX0
). Received data buffering allows
Crossbar
Crossbar
Port I/O
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