C8051F34A-GMR Silicon Labs, C8051F34A-GMR Datasheet - Page 220

• Manufacturer Part Number: C8051F34A-GMR
• Description: 8-bit Microcontrollers - MCU 48 MIPS 64KB 10ADC
• Manufacturer: Silicon Labs

Specifications of C8051F34A-GMR

• Rohs: yes
• Core: 8051
• Processor Series: C8051
• Data Bus Width: 8 bit

C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
220
Bit7:
Bit6:
Bits5–2: RESERVED: Read = 0000b; Must write 0000b.
Bits1–0: SB1PS[1:0]: Baud Rate Prescaler Select.
Bits7–0: SBUF1[7:0]: Serial Data Buffer Bits 7–0 (MSB-LSB)
Reserved SB1RUN Reserved Reserved Reserved Reserved SB1PS1
R/W
R/W
Bit7
Bit7
SFR Definition 19.4. SBCON1: UART1 Baud Rate Generator Control
RESERVED: Read = 0b; Must write 0b.
SB1RUN: Baud Rate Generator Enable.
0: Baud Rate Generator is disabled. UART1 will not function.
1: Baud Rate Generator is enabled.
00: Prescaler = 12
01: Prescaler = 4
10: Prescaler = 48
11: Prescaler = 1
This SFR is used to both send data from the UART and to read received data from the
UART1 receive FIFO.
Write: Writing a byte to SBUF1 initiates the transmission. When data is written to SBUF1, it
first goes to the Transmit Holding Register, where it is held for serial transmission. When the
transmit shift register is available, data is transferred into the shift register, and SBUF1 may
be written again.
Read: Reading SBUF1 retrieves data from the receive FIFO. When read, the oldest byte in
the receive FIFO is returned, and removed from the FIFO. Up to three bytes may be held in
the FIFO. If there are additional bytes available in the FIFO, the RI1 bit will remain at logic
‘1’, even after being cleared by software.
R/W
R/W
Bit6
Bit6
SFR Definition 19.3. SBUF1: UART1 Data Buffer
R/W
R/W
Bit5
Bit5
R/W
R/W
Bit4
Bit4
Rev. 1.3
R/W
R/W
Bit3
Bit3
R/W
R/W
Bit2
Bit2
R/W
R/W
Bit1
Bit1
SFR Address:
SFR Address:
SB1PS0
R/W
R/W
Bit0
Bit0
0xD3
0xAC
00000000
00000000
Reset Value
Reset Value