C8051F34A-GMR Silicon Labs, C8051F34A-GMR Datasheet - Page 28

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C8051F34A-GMR

Manufacturer Part Number
C8051F34A-GMR
Description
8-bit Microcontrollers - MCU 48 MIPS 64KB 10ADC
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051F34A-GMR

Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
4.
28
REGIN
Name
VBUS
Pinout and Package Definitions
C2CK
P3.0 /
GND
RST/
C2D
C2D
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
V
D+
D-
DD
Table 4.1. Pin Definitions for the C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
48-pin 32-pin
Pin Numbers
10
13
14
12
48
47
11
1
7
8
9
6
5
4
3
2
10
32
31
30
29
28
27
6
3
9
7
8
4
5
2
1
Power In
Power In 5 V Regulator Input. This pin is the input to the on-chip volt-
D I/O or
D I/O or
D I/O or
D I/O or
D I/O or
D I/O or
D I/O or
D I/O or
Power
Type
D I/O
D I/O
D I/O
D I/O
D I/O
D I/O
D I/O
D In
A In
A In
A In
A In
A In
A In
A In
A In
Out
Description
2.7–3.6 V Power Supply Voltage Input.
3.3 V Voltage Regulator Output. See
Ground.
Device Reset. Open-drain output of internal POR or V
monitor. An external source can initiate a system reset by
driving this pin low for at least 15 µs. See
Clock signal for the C2 Debug Interface.
Bi-directional data signal for the C2 Debug Interface.
Port 3.0. See
3.
Bi-directional data signal for the C2 Debug Interface.
age regulator.
VBUS Sense Input. This pin should be connected to the
VBUS signal of a USB network. A 5 V signal on this pin indi-
cates a USB network connection.
USB D+.
USB D–.
Port 0.0. See
0.
Port 0.1.
Port 0.2.
Port 0.3.
Port 0.4.
Port 0.5.
Port 0.6.
Port 0.7.
Rev. 1.3
Section 15
Section 15
for a complete description of Port
for a complete description of Port
Section
Section
8.
11.
DD

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