R0K561622S000BE Renesas Electronics America, R0K561622S000BE Datasheet - Page 253

• Manufacturer Part Number: R0K561622S000BE
• Description: KIT STARTER FOR H8SX/1622
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K561622S000BE

• Contents: Board, Cables, CD, Debugger, Power Supply
• Silicon Manufacturer: Renesas
• Features: Coding And Debugging, E10A Emulator, RS232 Serial Connection
• Kit Contents: Board
• Silicon Family Name: H8SX/1622F
• Silicon Core Number: R5F61622N50LGV
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: H8SX/1622
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

8.8
In this LSI, external address space areas 0 and 1 can be designated as burst ROM space, and burst
ROM interfacing performed. The burst ROM interface enables ROM with page access capability
to be accessed at high speed.
Areas 1 and 0 can be designated as burst ROM space by means of bits BSRM1 and BSRM0 in
BROMCR. Consecutive burst accesses of up to 32 words can be performed, according to the
setting of bits BSWDn1 and BSWDn0 (n = 0, 1) in BROMCR. From one to eight cycles can be
selected for burst access.
Settings can be made independently for area 0 and area 1.
In the burst ROM interface, the burst access covers only CPU read accesses. Other accesses are
performed with the similar method to the basic bus interface.
8.8.1
Burst ROM interface can be specified for areas 0 and 1. Areas 0 and 1 can be specified as burst
ROM space by setting bits BSRMn (n = 0, 1) in BROMCR.
8.8.2
The bus width of the burst ROM space can be specified as 8-bit or 16-bit burst ROM interface
space according to the ABWHn and ABWLn bits (n = 0, 1) in ABWCR.
For the 8-bit bus width, data bus (D7 to D0) is valid. For the 16-bit bus width, data bus (D15 to
D0) is valid.
Access size and data alignment are the same as the basic bus interface. For details, see section
8.5.6, Endian and Data Alignment.
Burst ROM Interface
Burst ROM Space Setting
Data Bus
Rev. 2.00 Sep. 16, 2009 Page 223 of 1036
Section 8 Bus Controller (BSC)
REJ09B0414-0200