R0K561622S000BE Renesas Electronics America, R0K561622S000BE Datasheet - Page 647

KIT STARTER FOR H8SX/1622

R0K561622S000BE

Manufacturer Part Number
R0K561622S000BE
Description
KIT STARTER FOR H8SX/1622
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets

Specifications of R0K561622S000BE

Contents
Board, Cables, CD, Debugger, Power Supply
Silicon Manufacturer
Renesas
Features
Coding And Debugging, E10A Emulator, RS232 Serial Connection
Kit Contents
Board
Silicon Family Name
H8SX/1622F
Silicon Core Number
R5F61622N50LGV
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
H8SX/1622
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Bit Functions in Normal Serial Communication Interface Mode (When SMIF in SCMR = 0):
Bit
7
6
Bit Name
TDRE
RDRF
Initial
Value
1
0
R/W
R/(W)* Transmit Data Register Empty
R/(W)* Receive Data Register Full
Description
Indicates whether TDR contains transmit data.
[Setting conditions]
[Clearing conditions]
Indicates whether receive data is stored in RDR.
[Setting condition]
[Clearing conditions]
The RDRF flag is not affected and retains its previous
value when the RE bit in SCR is cleared to 0.
Note that when the next serial reception is completed
while the RDRF flag is being set to 1, an overrun error
occurs and the received data is lost.
When the TE bit in SCR is 0
When data is transferred from TDR to TSR
When 0 is written to TDRE after reading TDRE = 1
(When the CPU is used to clear this flag by writing 0
while the corresponding interrupt is enabled, be sure
to read the flag after writing 0 to it.)
When a TXI interrupt request is issued allowing
DMAC or DTC to write data to TDR
When serial reception ends normally and receive
data is transferred from RSR to RDR
When 0 is written to RDRF after reading RDRF = 1
When an RXI interrupt request is issued allowing
DMAC or DTC to read data from RDR
(When the CPU is used to clear this flag by writing 0
while the corresponding interrupt is enabled, be
sure to read the flag after writing 0 to it.)
Section 16 Serial Communication Interface (SCI)
Rev. 2.00 Sep. 16, 2009 Page 617 of 1036
REJ09B0414-0200

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