R0K561622S000BE Renesas Electronics America, R0K561622S000BE Datasheet - Page 76

KIT STARTER FOR H8SX/1622

R0K561622S000BE

Manufacturer Part Number
R0K561622S000BE
Description
KIT STARTER FOR H8SX/1622
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets

Specifications of R0K561622S000BE

Contents
Board, Cables, CD, Debugger, Power Supply
Silicon Manufacturer
Renesas
Features
Coding And Debugging, E10A Emulator, RS232 Serial Connection
Kit Contents
Board
Silicon Family Name
H8SX/1622F
Silicon Core Number
R5F61622N50LGV
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
H8SX/1622
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Section 2 CPU
[Legend]
d:
S:
D:
SD:
S/D:
S:4:
Notes: 1. Only @aa:16 is available.
Rev. 2.00 Sep. 16, 2009 Page 46 of 1036
REJ09B0414-0200
Classifi-
cation
Bit
manipu-
lation
Branch
System
control
d:16 or d:32
Can be specified as a source operand.
Can be specified as a destination operand.
Can be specified as either a source or destination operand or both.
Can be specified as either a source or destination operand.
4-bit immediate data can be specified as a source operand.
2. @ERn+ as a source operand and @−ERn as a destination operand
3. Specified by ER5 as a source address and ER6 as a destination address for data
4. Size of data to be added with a displacement
5. Only @ERn− is available
6. When the number of bits to be shifted is 1, 2, 4, 8, or 16
7. When the number of bits to be shifted is specified by 5-bit immediate data or a general
8. Size of data to specify a branch condition
9. Byte when immediate or register direct, otherwise, word
10. Only @ERn+ is available
11. Only @−ERn is available
12. Not available in this LSI.
Instruction
BFLD
BFST
BSR/BS, BSR/BC*
LDC
(CCR, EXR)
LDC
(VBR, SBR)
STC
(CCR, EXR)
STC
(VBR, SBR)
ANDC, ORC,
XORC
SLEEP
NOP
BRA/BS, BRA/BC*
transfer.
register
8
8
Size
B
B
B
B
B/W*
L
B/W*
L
B
9
9
#xx
S
S
Rn
D
S
S
S
D
D
@ERn @(d,ERn)
S
D
S
S
S
D
S
D
Addressing Mode
@(d,
RnL.B/
Rn.W/
ERn.L)
@−ERn/
@ERn+/
@ERn−/
@+ERn
S*
D*
10
11
@aa:8
S
D
S
S
@aa:16/
@aa:32
S
D
S
S
S
D
O
O

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