R0K561622S000BE Renesas Electronics America, R0K561622S000BE Datasheet - Page 958

• Manufacturer Part Number: R0K561622S000BE
• Description: KIT STARTER FOR H8SX/1622
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K561622S000BE

• Contents: Board, Cables, CD, Debugger, Power Supply
• Silicon Manufacturer: Renesas
• Features: Coding And Debugging, E10A Emulator, RS232 Serial Connection
• Kit Contents: Board
• Silicon Family Name: H8SX/1622F
• Silicon Core Number: R5F61622N50LGV
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: H8SX/1622
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Section 25 List of Registers
25.1
Register Name
A/D data register A
A/D data register B
A/D data register C
A/D data register D
A/D data register E
A/D data register F
A/D data register G
A/D data register H
A/D control/status register
A/D control register
∆Σ A/D data register 0
∆Σ A/D data register 1
∆Σ A/D data register 2
∆Σ A/D data register 3
∆Σ A/D data register 4
∆Σ A/D data register 5
∆Σ A/D offset cancel DAC input 0
∆Σ A/D offset cancel DAC input 1
∆Σ A/D offset cancel DAC input 2
∆Σ A/D offset cancel DAC input 3
∆Σ A/D control/status register
∆Σ A/D control register
∆Σ A/D mode register
Break address register AH
Break address register AL
Break address mask register AH
Break address mask register AL
Rev. 2.00 Sep. 16, 2009 Page 928 of 1036
REJ09B0414-0200
Register Addresses (Address Order)
Abbreviation
ADDRA
ADDRB
ADDRC
ADDRD
ADDRE
ADDRF
ADDRG
ADDRH
ADCSR
ADCR
DSADDR0
DSADDR1
DSADDR2
DSADDR3
DSADDR4
DSADDR5
DSADOF0
DSADOF1
DSADOF2
DSADOF3
DSADCSR
DSADCR
DSADMR
BARAH
BARAL
BAMRAH
BAMRAL
Number
of Bits
16
16
16
16
16
16
16
16
8
8
16
16
16
16
16
16
16
16
16
16
16
16
8
16
16
16
16
H'FEC10
H'FEC12
H'FEC14
H'FEC16
H'FEC18
H'FEC24
H'FFA02
H'FFA04
H'FFA06
Address
H'FEA60
H'FEA62
H'FEA64
H'FEA66
H'FEA68
H'FEA6A
H'FEA6C
H'FEA6E
H'FEA70
H'FEA71
H'FEC00
H'FEC02
H'FEC04
H'FEC06
H'FEC08
H'FEC0A
H'FEC1A
H'FFA00
Module
A/D
A/D
A/D
A/D
A/D
A/D
A/D
A/D
A/D
A/D
∆ΣA/D
∆ΣA/D
∆ΣA/D
∆ΣA/D
∆ΣA/D
∆ΣA/D
∆ΣA/D
∆ΣA/D
∆ΣA/D
∆ΣA/D
∆ΣA/D
∆ΣA/D
∆ΣA/D
UBC
UBC
UBC
UBC
Data
Width
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
Access
Cycles
(Read/Write)
3Pφ/3Pφ
3Pφ/3Pφ
3Pφ/3Pφ
3Pφ/3Pφ
3Pφ/3Pφ
3Pφ/3Pφ
3Pφ/3Pφ
3Pφ/3Pφ
3Pφ/3Pφ
3Pφ/3Pφ
3Pφ/3Pφ
3Pφ/3Pφ
3Pφ/3Pφ
3Pφ/3Pφ
3Pφ/3Pφ
3Pφ/3Pφ
3Pφ/3Pφ
3Pφ/3Pφ
3Pφ/3Pφ
3Pφ/3Pφ
3Pφ/3Pφ
3Pφ/3Pφ
3Pφ/3Pφ
2Iφ/2Iφ
2Iφ/2Iφ
2Iφ/2Iφ
2Iφ/2Iφ