IC MCU 8BIT 3MHZ 52-PLCC

MC68HC11E0CFNE3

Manufacturer Part NumberMC68HC11E0CFNE3
DescriptionIC MCU 8BIT 3MHZ 52-PLCC
ManufacturerFreescale Semiconductor
SeriesHC11
MC68HC11E0CFNE3 datasheets
 


Specifications of MC68HC11E0CFNE3

Core ProcessorHC11Core Size8-Bit
Speed3MHzConnectivitySCI, SPI
PeripheralsPOR, WDTNumber Of I /o38
Program Memory TypeROMlessRam Size512 x 8
Voltage - Supply (vcc/vdd)4.5 V ~ 5.5 VData ConvertersA/D 8x8b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Package / Case52-PLCCController Family/series68HC11
No. Of I/o's38Ram Memory Size512Byte
Cpu Speed3MHzNo. Of Timers1
Embedded Interface TypeSCI, SPIDigital Ic Case StyleLCC
Rohs CompliantYesProcessor SeriesHC11E
CoreHC11Data Bus Width8 bit
Data Ram Size512 BInterface TypeSCI, SPI
Maximum Clock Frequency3 MHzNumber Of Programmable I/os38
Number Of Timers8Maximum Operating Temperature+ 85 C
Mounting StyleSMD/SMTMinimum Operating Temperature- 40 C
On-chip Adc8 bit, 8 ChannelLead Free Status / RoHS StatusLead free / RoHS Compliant
Eeprom Size-Program Memory Size-
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Freescale Semiconductor, Inc.
PC0/ADDR0
PC1/ADDR1
PC2/ADDR2
PC3/ADDR3
PC4/ADDR4
PC5/ADDR5
PC6/ADDR6
PC7/ADDR7
XIRQ/V
PD7/R/W
PD6/AS
RESET
PD0/RxD
PD1/TxD
PD2/MISO
PD3/MOSI
PD4/SCK
PD5/SS
Figure 2-2 Pin Assignments for 40-Pin DIP
2.1 V
, V
, and EV
DD
SS
SS
Power is supplied to the MCU through V
V
is ground. EV
, available on the 44-pin PLCC, is an additional ground pin that
SS
SS
must be grounded with V
SS
supply. Very fast signal transitions occur on the MCU pins. The short rise and fall times
place high, short duration current demands on the power supply. To prevent noise
problems, provide good power supply bypassing at the MCU. Also, use bypass capac-
itors that have good high-frequency characteristics and situate them as close to the
MCU as possible. Bypass requirements vary, depending on how heavily the MCU pins
are loaded.
2.2 Reset (RESET)
An active low bidirectional control signal, RESET, acts as an input to initialize the MCU
to a known startup state. It also acts as an open-drain output to indicate that an internal
failure has been detected in either the clock monitor or COP watchdog circuit. The
CPU distinguishes between internal and external reset conditions by sensing whether
the reset pin rises to a logic one in less than two E-clock cycles after a reset has oc-
curred. It is not advisable to connect an external resistor-capacitor (RC) power-up de-
lay circuit to the reset pin of M68HC11 devices because the circuit charge time
2-2
For More Information On This Product,
40
XTAL
V
1
SS
39
EXTAL
2
38
E
3
37
MODA/LIR
4
5
36
MODB/V
6
35
PB0/ADDR8
34
PB1/ADDR9
7
MC68HC(7)11D3
33
PB2/ADDR10
8
9
32
PB3/ADDR11
31
PB4/ADDR12
10
PP
11
30
PB5/ADDR13
29
PB6/ADDR14
12
28
PB7/ADDR15
13
27
PA0/IC3
IRQ
14
26
PA1/IC2
15
25
PA2/IC1
16
24
PA3/IC4/OC5/OC1
17
23
PA5/OC3/OC1
18
22
PA7/PAI/OC1
19
21
V
20
DD
and V
. V
DD
SS
. The MCU operates from a single 5-volt (nominal) power
PIN DESCRIPTIONS
Go to: www.freescale.com
STBY
D3 40-PIN DIP
is the power supply, and
SS
TECHNICAL DATA