IC MCU 8BIT 3MHZ 52-PLCC

MC68HC11E0CFNE3

Manufacturer Part NumberMC68HC11E0CFNE3
DescriptionIC MCU 8BIT 3MHZ 52-PLCC
ManufacturerFreescale Semiconductor
SeriesHC11
MC68HC11E0CFNE3 datasheets
 

Specifications of MC68HC11E0CFNE3

Core ProcessorHC11Core Size8-Bit
Speed3MHzConnectivitySCI, SPI
PeripheralsPOR, WDTNumber Of I /o38
Program Memory TypeROMlessRam Size512 x 8
Voltage - Supply (vcc/vdd)4.5 V ~ 5.5 VData ConvertersA/D 8x8b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Package / Case52-PLCCController Family/series68HC11
No. Of I/o's38Ram Memory Size512Byte
Cpu Speed3MHzNo. Of Timers1
Embedded Interface TypeSCI, SPIDigital Ic Case StyleLCC
Rohs CompliantYesProcessor SeriesHC11E
CoreHC11Data Bus Width8 bit
Data Ram Size512 BInterface TypeSCI, SPI
Maximum Clock Frequency3 MHzNumber Of Programmable I/os38
Number Of Timers8Maximum Operating Temperature+ 85 C
Mounting StyleSMD/SMTMinimum Operating Temperature- 40 C
On-chip Adc8 bit, 8 ChannelLead Free Status / RoHS StatusLead free / RoHS Compliant
Eeprom Size-Program Memory Size-
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Freescale Semiconductor, Inc.
TRANSMITTER
BAUD RATE
SCDR Tx BUFFER
CLOCK
10 (11) - BIT Tx SHIFT REGISTER
H (8) 7
6
5
4
SCCR1 SCI CONTROL 1
SCI Rx
SCI INTERRUPT
REQUESTS
REQUEST
Figure 7-1 SCI Transmitter Block Diagram
7.3 Receive Operation
During receive operations, the transmit sequence is reversed. The serial shift register
receives data and transfers it to a parallel receive data register (SCDR) as a complete
word. Refer to Figure 7-2. This double buffered operation allows a character to be
shifted in serially while another character is already in the SCDR. An advanced data
SERIAL COMMUNICATIONS INTERFACE
7-2
For More Information On This Product,
(WRITE ONLY)
3
2
1
0
L
8
FORCE PIN
DIRECTION (OUT)
TRANSMITTER
CONTROL LOGIC
SCSR INTERRUPT STATUS
TDRE
TIE
TC
TCIE
SCCR2 SCI CONTROL 2
Go to: www.freescale.com
DDD1
PIN BUFFER
PD1
AND CONTROL
TxD
8
8
INTERNAL
DATA BUS
11 SCI TX BLOCK
TECHNICAL DATA