IC MCU 8BIT 3MHZ 52-PLCC

MC68HC11E0CFNE3

Manufacturer Part NumberMC68HC11E0CFNE3
DescriptionIC MCU 8BIT 3MHZ 52-PLCC
ManufacturerFreescale Semiconductor
SeriesHC11
MC68HC11E0CFNE3 datasheets
 

Specifications of MC68HC11E0CFNE3

Core ProcessorHC11Core Size8-Bit
Speed3MHzConnectivitySCI, SPI
PeripheralsPOR, WDTNumber Of I /o38
Program Memory TypeROMlessRam Size512 x 8
Voltage - Supply (vcc/vdd)4.5 V ~ 5.5 VData ConvertersA/D 8x8b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Package / Case52-PLCCController Family/series68HC11
No. Of I/o's38Ram Memory Size512Byte
Cpu Speed3MHzNo. Of Timers1
Embedded Interface TypeSCI, SPIDigital Ic Case StyleLCC
Rohs CompliantYesProcessor SeriesHC11E
CoreHC11Data Bus Width8 bit
Data Ram Size512 BInterface TypeSCI, SPI
Maximum Clock Frequency3 MHzNumber Of Programmable I/os38
Number Of Timers8Maximum Operating Temperature+ 85 C
Mounting StyleSMD/SMTMinimum Operating Temperature- 40 C
On-chip Adc8 bit, 8 ChannelLead Free Status / RoHS StatusLead free / RoHS Compliant
Eeprom Size-Program Memory Size-
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Freescale Semiconductor, Inc.
3.5 Instruction Set
Refer to Table 3-2, which shows all the M68HC11 instructions in all possible address-
ing modes. For each instruction, the table shows the operand construction, the number
of machine code bytes, and execution time in CPU E-clock cycles.
Table 3-2 Instruction Set (Sheet 1 of 7)
Mnemonic
Operation
Description
ABA
Add
A + B
A
Accumulators
ABX
Add B to X
IX + (00 : B)
IX
ABY
Add B to Y
IY + (00 : B)
IY
ADCA (opr)
Add with Carry
A + M + C
A
to A
ADCB (opr)
Add with Carry
B + M + C
B
to B
ADDA (opr)
Add Memory
A + M
A
to A
ADDB (opr)
Add Memory
B + M
B
to B
ADDD (opr)
Add 16-Bit to D D + (M : M + 1)
ANDA (opr)
AND A with
A • M
A
Memory
ANDB (opr)
AND B with
B • M
B
Memory
ASL (opr)
Arithmetic
Shift Left
0
C
b7
b0
ASLA
Arithmetic
Shift Left A
0
C
b7
b0
ASLB
Arithmetic
Shift Left B
0
b7
b0
C
ASLD
Arithmetic
Shift Left D
C
b7
A
b0
b7
B
b0
ASR
Arithmetic
Shift Right
b7
b0
C
ASRA
Arithmetic
Shift Right A
b7
b0
C
ASRB
Arithmetic
Shift Right B
b7
b0
C
BCC (rel)
Branch if Carry
? C = 0
Clear
3-8
For More Information On This Product,
Addressing
Instruction
Mode
Opcode
Operand Cycles
INH
1B
INH
3A
INH
18
3A
A
IMM
89
ii
A
DIR
99
dd
A
EXT
B9
hh ll
A
IND,X
A9
ff
A
IND,Y
18
A9
ff
B
IMM
C9
ii
B
DIR
D9
dd
B
EXT
F9
hh ll
B
IND,X
E9
ff
B
IND,Y
18
E9
ff
A
IMM
8B
ii
A
DIR
9B
dd
A
EXT
BB
hh ll
A
IND,X
AB
ff
A
IND,Y
18
AB
ff
B
IMM
CB
ii
B
DIR
DB
dd
B
EXT
FB
hh ll
B
IND,X
EB
ff
B
IND,Y
18
EB
ff
D
IMM
C3
jj kk
DIR
D3
dd
EXT
F3
hh ll
IND,X
E3
ff
IND,Y
18
E3
ff
A
IMM
84
ii
A
DIR
94
dd
A
EXT
B4
hh ll
A
IND,X
A4
ff
A
IND,Y
18
A4
ff
B
IMM
C4
ii
B
DIR
D4
dd
B
EXT
F4
hh ll
B
IND,X
E4
ff
B
IND,Y
18
E4
ff
EXT
78
hh ll
IND,X
68
ff
IND,Y
18
68
ff
A
INH
48
B
INH
58
INH
05
0
EXT
77
hh ll
IND,X
67
ff
IND,Y
18
67
ff
A
INH
47
B
INH
57
REL
24
rr
CENTRAL PROCESSING UNIT
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Condition Codes
S
X
H
I
N
Z
V
C
2
3
4
2
3
4
4
5
2
3
4
4
5
2
3
4
4
5
2
3
4
4
5
4
5
6
6
7
2
0
3
4
4
5
2
0
3
4
4
5
6
6
7
2
2
3
6
6
7
2
2
3
TECHNICAL DATA