IC MCU 8BIT 3MHZ 52-PLCC

MC68HC11E0CFNE3

Manufacturer Part NumberMC68HC11E0CFNE3
DescriptionIC MCU 8BIT 3MHZ 52-PLCC
ManufacturerFreescale Semiconductor
SeriesHC11
MC68HC11E0CFNE3 datasheets
 

Specifications of MC68HC11E0CFNE3

Core ProcessorHC11Core Size8-Bit
Speed3MHzConnectivitySCI, SPI
PeripheralsPOR, WDTNumber Of I /o38
Program Memory TypeROMlessRam Size512 x 8
Voltage - Supply (vcc/vdd)4.5 V ~ 5.5 VData ConvertersA/D 8x8b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Package / Case52-PLCCController Family/series68HC11
No. Of I/o's38Ram Memory Size512Byte
Cpu Speed3MHzNo. Of Timers1
Embedded Interface TypeSCI, SPIDigital Ic Case StyleLCC
Rohs CompliantYesProcessor SeriesHC11E
CoreHC11Data Bus Width8 bit
Data Ram Size512 BInterface TypeSCI, SPI
Maximum Clock Frequency3 MHzNumber Of Programmable I/os38
Number Of Timers8Maximum Operating Temperature+ 85 C
Mounting StyleSMD/SMTMinimum Operating Temperature- 40 C
On-chip Adc8 bit, 8 ChannelLead Free Status / RoHS StatusLead free / RoHS Compliant
Eeprom Size-Program Memory Size-
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Freescale Semiconductor, Inc.
Table 3-2 Instruction Set (Sheet 6 of 7)
Mnemonic
Operation
Description
SBCA (opr)
Subtract with
A – M – C
A
Carry from A
SBCB (opr)
Subtract with
B – M – C
B
Carry from B
SEC
Set Carry
1
C
SEI
Set Interrupt
1
I
Mask
SEV
Set Overflow
1
V
Flag
STAA (opr)
Store
A
M
Accumulator
A
STAB (opr)
Store
B
M
Accumulator
B
STD (opr)
Store
A
M, B
M + 1
Accumulator
D
STOP
Stop Internal
Clocks
STS (opr)
Store Stack
SP
M : M + 1
Pointer
STX (opr)
Store Index
IX
M : M + 1
Register X
STY (opr)
Store Index
IY
M : M + 1
Register Y
SUBA (opr)
Subtract
A – M
A
Memory from
A
SUBB (opr)
Subtract
B – M
B
Memory from
B
SUBD (opr)
Subtract
D – M : M + 1
D
Memory from
D
SWI
Software
See Figure 3–2
Interrupt
TAB
Transfer A to B
A
B
TAP
Transfer A to
A
CCR
CC Register
TBA
Transfer B to A
B
A
TEST
TEST (Only in
Address Bus Counts
Test Modes)
TPA
Transfer CC
CCR
A
Register to A
TST (opr)
Test for Zero
M – 0
or Minus
TSTA
Test A for Zero
A – 0
or Minus
TSTB
Test B for Zero
B – 0
or Minus
TECHNICAL DATA
For More Information On This Product,
Addressing
Instruction
Mode
Opcode
Operand Cycles
A
IMM
82
ii
2
A
DIR
92
dd
3
A
EXT
B2
hh ll
4
A
IND,X
A2
ff
4
A
IND,Y
18
A2
ff
5
B
IMM
C2
ii
2
B
DIR
D2
dd
3
B
EXT
F2
hh ll
4
B
IND,X
E2
ff
4
B
IND,Y
18
E2
ff
5
INH
0D
2
INH
0F
2
INH
0B
2
A
DIR
97
dd
3
A
EXT
B7
hh ll
4
A
IND,X
A7
ff
4
A
IND,Y
18
A7
ff
5
B
DIR
D7
dd
3
B
EXT
F7
hh ll
4
B
IND,X
E7
ff
4
B
IND,Y
18
E7
ff
5
DIR
DD
dd
4
EXT
FD
hh ll
5
IND,X
ED
ff
5
IND,Y
18
ED
ff
6
INH
CF
2
DIR
9F
dd
4
EXT
BF
hh ll
5
IND,X
AF
ff
5
IND,Y
18
AF
ff
6
DIR
DF
dd
4
EXT
FF
hh ll
5
IND,X
EF
ff
5
IND,Y
CD
EF
ff
6
DIR
18
DF
dd
5
EXT
18
FF
hh ll
6
IND,X
1A
EF
ff
6
IND,Y
18
EF
ff
6
A
IMM
80
ii
2
A
DIR
90
dd
3
A
EXT
B0
hh ll
4
A
IND,X
A0
ff
4
A
IND,Y
18
A0
ff
5
A
IMM
C0
ii
2
A
DIR
D0
dd
3
A
EXT
F0
hh ll
4
A
IND,X
E0
ff
4
A
IND,Y
18
E0
ff
5
IMM
83
jj kk
4
DIR
93
dd
5
EXT
B3
hh ll
6
IND,X
A3
ff
6
IND,Y
18
A3
ff
7
INH
3F
14
INH
16
2
INH
06
2
INH
17
2
INH
00
*
INH
07
2
EXT
7D
hh ll
6
IND,X
6D
ff
6
IND,Y
18
6D
ff
7
A
INH
4D
2
B
INH
5D
2
CENTRAL PROCESSING UNIT
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Condition Codes
S
X
H
I
N
Z
V
C
1
1
1
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
3-13