IC MCU 8BIT 3MHZ 52-PLCC

MC68HC11E0CFNE3

Manufacturer Part NumberMC68HC11E0CFNE3
DescriptionIC MCU 8BIT 3MHZ 52-PLCC
ManufacturerFreescale Semiconductor
SeriesHC11
MC68HC11E0CFNE3 datasheets
 


Specifications of MC68HC11E0CFNE3

Core ProcessorHC11Core Size8-Bit
Speed3MHzConnectivitySCI, SPI
PeripheralsPOR, WDTNumber Of I /o38
Program Memory TypeROMlessRam Size512 x 8
Voltage - Supply (vcc/vdd)4.5 V ~ 5.5 VData ConvertersA/D 8x8b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Package / Case52-PLCCController Family/series68HC11
No. Of I/o's38Ram Memory Size512Byte
Cpu Speed3MHzNo. Of Timers1
Embedded Interface TypeSCI, SPIDigital Ic Case StyleLCC
Rohs CompliantYesProcessor SeriesHC11E
CoreHC11Data Bus Width8 bit
Data Ram Size512 BInterface TypeSCI, SPI
Maximum Clock Frequency3 MHzNumber Of Programmable I/os38
Number Of Timers8Maximum Operating Temperature+ 85 C
Mounting StyleSMD/SMTMinimum Operating Temperature- 40 C
On-chip Adc8 bit, 8 ChannelLead Free Status / RoHS StatusLead free / RoHS Compliant
Eeprom Size-Program Memory Size-
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Freescale Semiconductor, Inc.
polled or interrupt driven system. Each bit of TFLG1 corresponds to a bit in TMSK1 in
the same position.
TFLG1 — Timer Interrupt Flag 1
Bit 7
6
OC1F
OC2F
RESET:
0
0
Clear flags by writing a one to the corresponding bit position(s).
OC1F–OC5F — Output Compare x Flag
Set each time the counter matches output compare x value
I4/O5F — Input Capture 4/Output Compare 5 Flag
Set by IC4 or OC5, depending on the function enabled by I4/O5 bit in PACTL
IC1F–IC3F — Input Capture x Flag
Set each time a selected active edge is detected on the ICx input line
9.3.9 Timer Interrupt Mask 2 Register
Use this 8-bit register to enable or inhibit timer overflow and real-time interrupts. The
timer prescaler control bits are included in this register.
TMSK2 — Timer Interrupt Mask 2
Bit 7
6
TOI
RTII
RESET:
0
0
TOI — Timer Overflow Interrupt Enable
0 = TOF interrupts disabled
1 = Interrupt requested when TOF is set to one
RTII — Real-time Interrupt Enable
Refer to 9.4 Real-Time Interrupt.
PAOVI — Pulse Accumulator Overflow Interrupt Enable
Refer to 9.6 Pulse Accumulator.
PAII — Pulse Accumulator Input Edge Interrupt Enable
Refer to 9.6 Pulse Accumulator.
Bits in TMSK2 correspond bit for bit with flag bits in TFLG2. Ones in
TMSK2 enable the corresponding interrupt sources.
TECHNICAL DATA
For More Information On This Product,
5
4
3
OC3F
OC4F
I4/O5F
0
0
0
5
4
3
PAOVI
PAII
0
0
0
0
NOTE
TIMING SYSTEM
Go to: www.freescale.com
$0023
2
1
Bit 0
IC1F
IC2F
IC3F
0
0
0
$0024
2
1
Bit 0
0
PR1
PR0
0
0
0
9-11