IC MCU 8BIT 3MHZ 52-PLCC

MC68HC11E0CFNE3

Manufacturer Part NumberMC68HC11E0CFNE3
DescriptionIC MCU 8BIT 3MHZ 52-PLCC
ManufacturerFreescale Semiconductor
SeriesHC11
MC68HC11E0CFNE3 datasheets
 

Specifications of MC68HC11E0CFNE3

Core ProcessorHC11Core Size8-Bit
Speed3MHzConnectivitySCI, SPI
PeripheralsPOR, WDTNumber Of I /o38
Program Memory TypeROMlessRam Size512 x 8
Voltage - Supply (vcc/vdd)4.5 V ~ 5.5 VData ConvertersA/D 8x8b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Package / Case52-PLCCController Family/series68HC11
No. Of I/o's38Ram Memory Size512Byte
Cpu Speed3MHzNo. Of Timers1
Embedded Interface TypeSCI, SPIDigital Ic Case StyleLCC
Rohs CompliantYesProcessor SeriesHC11E
CoreHC11Data Bus Width8 bit
Data Ram Size512 BInterface TypeSCI, SPI
Maximum Clock Frequency3 MHzNumber Of Programmable I/os38
Number Of Timers8Maximum Operating Temperature+ 85 C
Mounting StyleSMD/SMTMinimum Operating Temperature- 40 C
On-chip Adc8 bit, 8 ChannelLead Free Status / RoHS StatusLead free / RoHS Compliant
Eeprom Size-Program Memory Size-
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Freescale Semiconductor, Inc.
EXTAL
MCU
XTAL
Figure 2-5 External Oscillator Connections
EXTAL
10 M
FIRST
MCU
XTAL
*
THIS VALUE INCLUDES ALL STRAY CAPACITANCES.
Figure 2-6 One Crystal Driving Two MCUs
2.4 E-Clock Output (E)
E is the output connection for the internally generated E clock. The signal from E is
used as a timing reference. The frequency of the E-clock output is one fourth that of
the input frequency at the XTAL and EXTAL pins. When E-clock output is low, an in-
ternal process is taking place. When it is high, data is being accessed. All clocks, in-
cluding the E clock, are halted when the MCU is in STOP mode. The E clock can be
turned off in single-chip modes to reduce the effects of radio frequency interference
(RFI).
2.5 Interrupt Request (IRQ)
The IRQ input provides a means of applying asynchronous interrupt requests to the
MCU. Either negative edge-sensitive triggering or level-sensitive triggering is program
selectable (OPTION register). IRQ is always configured to level-sensitive triggering at
reset. Connect an external pullup resistor, typically 4.7 k , to V
in a level sensitive wired-OR configuration.
2.6 Non-Maskable Interrupt (XIRQ)
The XIRQ input provides a means of requesting a nonmaskable interrupt after reset
initialization. During reset, the X bit in the condition code register (CCR) is set and any
interrupt is masked until MCU software enables it. Because the XIRQ input is level-
2-4
For More Information On This Product,
4 x E
CMOS-COMPATIBLE
EXTERNAL OSCILLATOR
NC
*
25 pF
4 x E
CRYSTAL
*
25 pF
PIN DESCRIPTIONS
Go to: www.freescale.com
EXT EXTAL CONN
220
EXTAL
SECOND
MCU
NC
XTAL
DUAL-MCU XTAL CONN
when IRQ is used
DD
TECHNICAL DATA