IC MCU 8BIT 3MHZ 52-PLCC

MC68HC11E0CFNE3

Manufacturer Part NumberMC68HC11E0CFNE3
DescriptionIC MCU 8BIT 3MHZ 52-PLCC
ManufacturerFreescale Semiconductor
SeriesHC11
MC68HC11E0CFNE3 datasheets
 


Specifications of MC68HC11E0CFNE3

Core ProcessorHC11Core Size8-Bit
Speed3MHzConnectivitySCI, SPI
PeripheralsPOR, WDTNumber Of I /o38
Program Memory TypeROMlessRam Size512 x 8
Voltage - Supply (vcc/vdd)4.5 V ~ 5.5 VData ConvertersA/D 8x8b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Package / Case52-PLCCController Family/series68HC11
No. Of I/o's38Ram Memory Size512Byte
Cpu Speed3MHzNo. Of Timers1
Embedded Interface TypeSCI, SPIDigital Ic Case StyleLCC
Rohs CompliantYesProcessor SeriesHC11E
CoreHC11Data Bus Width8 bit
Data Ram Size512 BInterface TypeSCI, SPI
Maximum Clock Frequency3 MHzNumber Of Programmable I/os38
Number Of Timers8Maximum Operating Temperature+ 85 C
Mounting StyleSMD/SMTMinimum Operating Temperature- 40 C
On-chip Adc8 bit, 8 ChannelLead Free Status / RoHS StatusLead free / RoHS Compliant
Eeprom Size-Program Memory Size-
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Freescale Semiconductor, Inc.
The MC68HC11D3 has four 8-bit I/O ports; A, B, C, and D. In single-chip and bootstrap
modes, all ports are parallel I/O data ports. In expanded multiplexed and test modes,
ports B and C, and lines DATA6/AS and DATA7/R/W are a memory expansion bus
with port B as the high order address bus, port C as the multiplexed address and data
bus, AS as the demultiplexing signal, and R/W as the data bus direction control. Refer
to Table 6-1, which is a summary of the ports and their shared functions:
Port
Input Pins
Port A
3
Port B
Port C
Port D
6.1 Port A
Port A bits handle the timer functions and can also be used as general-purpose I/O. In
both the normal operating modes, port A can be configured for four timer input capture
(IC) and three timer output compare (OC) functions, or four OC and three IC functions
with either a pulse accumulator input (PAI) or a fifth OC function.
PORTA — Port A Data
Bit 7
6
PA7
PA6*
RESET:
HiZ
0
Alt. Func:
PAI
OC2
And/or:
OC1
OC1
*This pin is not bonded in the 40-pin version.
6.2 Port B
In single-chip mode, all port B pins are general-purpose I/O (PB[7:0]). In expanded
multiplexed mode, all port B pins act as high-order address bits (ADDR[15:8]).
PORTB — Port B Data
Bit 7
6
PB7
PB6
S. Chip
or Boot:
PB7
PB6
RESET:
Expan.
or Test:
ADDR15
ADDR14
RESET:
TECHNICAL DATA
For More Information On This Product,
SECTION 6
PARALLEL I/O
Table 6-1 I/O Ports
Output Pins
Bidirectional Pins
3
2
8
8
8
5
4
3
PA5
PA4*
PA3
0
0
HiZ
OC3
OC4
IC4/OC5
OC1
OC1
OC1
5
4
3
PB5
PB4
PB3
PB5
PB4
PB3
Reset configures pins as HiZ inputs
ADDR13
ADDR12
ADDR11
Reset configures pins as high-order address outputs
PARALLEL I/O
Go to: www.freescale.com
Shared Functions
TImer
High Order Address
Low Order Address and Data Bus
SCI, SPI, AS, and R/
$0000
2
1
Bit 0
PA2
PA1
PA0
HiZ
HiZ
HiZ
IC1
IC2
IC3
$0004
2
1
Bit 0
PB2
PB1
PB0
PB2
PB1
PB0
ADDR10
ADDR9
ADDR8
6-1