IC MCU 8BIT 3MHZ 52-PLCC

MC68HC11E0CFNE3

Manufacturer Part NumberMC68HC11E0CFNE3
DescriptionIC MCU 8BIT 3MHZ 52-PLCC
ManufacturerFreescale Semiconductor
SeriesHC11
MC68HC11E0CFNE3 datasheets
 


Specifications of MC68HC11E0CFNE3

Core ProcessorHC11Core Size8-Bit
Speed3MHzConnectivitySCI, SPI
PeripheralsPOR, WDTNumber Of I /o38
Program Memory TypeROMlessRam Size512 x 8
Voltage - Supply (vcc/vdd)4.5 V ~ 5.5 VData ConvertersA/D 8x8b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Package / Case52-PLCCController Family/series68HC11
No. Of I/o's38Ram Memory Size512Byte
Cpu Speed3MHzNo. Of Timers1
Embedded Interface TypeSCI, SPIDigital Ic Case StyleLCC
Rohs CompliantYesProcessor SeriesHC11E
CoreHC11Data Bus Width8 bit
Data Ram Size512 BInterface TypeSCI, SPI
Maximum Clock Frequency3 MHzNumber Of Programmable I/os38
Number Of Timers8Maximum Operating Temperature+ 85 C
Mounting StyleSMD/SMTMinimum Operating Temperature- 40 C
On-chip Adc8 bit, 8 ChannelLead Free Status / RoHS StatusLead free / RoHS Compliant
Eeprom Size-Program Memory Size-
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Freescale Semiconductor, Inc.
In expanded mode, ROM is located at $7000–$7FFF out of reset. In
all other modes, ROM is located at $F000–$FFFF.
4.2.2.2 INIT Register
The internal registers used to control the operation of the MCU can be relocated on 4K
boundaries within the memory space with the use of INIT. This 8-bit special-purpose
register can change the default locations of the RAM and control registers within the
MCU memory map. It can be written to only once within the first 64 E-clock cycles after
a reset, and then it becomes a read-only register.
INIT — RAM and I/O Mapping Register
Bit 7
6
RAM3
RAM2
RESET:
0
0
RAM[3:0] — RAM Map Position
These four bits, which specify the upper hexadecimal digit of the RAM address, control
position of RAM in the memory map. RAM can be positioned at the beginning of any
4K page in the memory map. It is initialized to address $0040 out of reset. Refer to
Table 4-3.
REG[3:0] — 64-Byte Register Block Position
These four bits specify the upper hexadecimal digit of the address for the 64-byte block
of internal registers. The register block, positioned at the beginning of any 4K page in
the memory map, is initialized to address $0000 out of reset. Refer to Table 4-4.
Table 4-3 RAM Mapping
RAM[3:0]
Address
0000
$0040–$00FF
0001
$1040–$10FF
0010
$2040–$20FF
0011
$3040–$30FF
0100
$4040–$40FF
0101
$5040–$50FF
0110
$6040–$60FF
0111
$7040–$70FF
1000
$8040–$80FF
1001
$9040–$90FF
1010
$A040–$A0FF
1011
$B040–$B0FF
1100
$C040–$C0FF
1101
$D040–$D0FF
1110
$E040–$E0FF
1111
$F040–$F0FF
OPERATING MODES AND ON-CHIP MEMORY
TECHNICAL DATA
For More Information On This Product,
NOTE
5
4
3
RAM1
RAM0
REG3
0
0
0
Table 4-4 Register Mapping
REG[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Go to: www.freescale.com
$003D
2
1
Bit 0
REG2
REG1
REG0
0
0
1
Address
$0000–$003F
$1000–$103F
$2000–$203F
$3000–$303F
$4000–$403F
$5000–$503F
$6000–$603F
$7000–$703F
$8000–$803F
$9000–$903F
$A000–$A03F
$B000–$B03F
$C000–$C03F
$D000–$D03F
$E000–$E03F
$F000–$F03F
4-9