AD6636CBCZ Analog Devices Inc, AD6636CBCZ Datasheet - Page 27

IC DIGITAL DWNCONV 4CH 256CSPBGA

AD6636CBCZ

Manufacturer Part Number
AD6636CBCZ
Description
IC DIGITAL DWNCONV 4CH 256CSPBGA
Manufacturer
Analog Devices Inc
Series
AD6636r
Datasheet

Specifications of AD6636CBCZ

Rf Type
Cellular, CDMA2000, EDGE, GPRS, GSM
Number Of Mixers
1
Secondary Attributes
Down Converter
Current - Supply
450mA
Voltage - Supply
3 V ~ 3.6 V
Package / Case
256-CSPBGA
Brief Features
4/6 Independent Wideband Processing Channel, Quadrature Correction & DC Correction For Complex Input
Supply Voltage Range
1.7V To 1.9V
Operating Temperature Range
-40°C To +85°C
Ic Function
Digital Down Converter (DDC)
Rohs Compliant
Yes
Pin Count
256
Screening Level
Industrial
Package Type
CSPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Frequency
-
Gain
-
Noise Figure
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD6636CBCZ
Manufacturer:
ADI
Quantity:
240
MAG(I)) can be between 1.125 and 0.875 with a 14-bit
resolution.
When the amplitude offset correction circuit is disabled, the value
in the amplitude offset correction register is multiplied by the
Q path data and added to the Q path data continuously. This
method can be used to manually set the amplitude offset instead of
using the automatic amplitude offset correction circuit.
INPUT CROSSBAR MATRIX
The AD6636 has four ADC input ports and six channels. Two
input ports can be paired to support complex input ports.
Crossbar mux selection allows each channel to select its input
signal from the following sources: four real input ports, two
complex input ports, and internally generated pseudorandom
sequence (referred to as a PN sequence, which can be either real
or complex). Each channel has an input crossbar matrix to
select from the above-listed input signal choices.
The selection of the input signal for a particular channel is
made using a 3-bit crossbar mux select word and a 1-bit
complex data input bit selection in the ADC input control
register. Each channel has a separate selection for individual
control. Table 13 lists the valid combinations of the crossbar
mux select word, the complex data input bit values, and the
corresponding input signal selections.
NUMERICALLY CONTROLLED OSCILLATOR (NCO)
Each channel consists of an independent complex NCO and a
complex mixer. This processing stage has a digital tuner
consisting of three multipliers and a 32-bit complex NCO. The
NCO serves as a quadrature local oscillator capable of produc-
ing an NCO frequency of between −CLK/2 and +CLK/2 with a
resolution of CLK/2
clock frequency.
The frequency word used for generating the NCO is a 32-bit
word. This word is used to generate a 20-bit phase word. A
16-bit phase offset word is added to this phase word. Eighteen
bits of this phase word are used to generate the sine and cosine
of the required NCO frequency.
Table 13. Crossbar Mux Selection for Channel Input Signal
Complex Input Bit
0
0
0
0
0
1
1
1
32
in complex mode, where CLK is the input
Crossbar Mux Select Bit
000
001
010
011
100
000
001
010
Input Signal Selection
Input Port A magnitude and exponent pins drive the channel.
Input Port B magnitude and exponent pins drive the channel.
Input Port C magnitude and exponent pins drive the channel.
Input Port D magnitude and exponent pins drive the channel.
Internal PN sequence’s magnitude and exponent bits drive the channel.
Input Ports A and B form a pair to drive I and Q paths of the channel, respectively.
Input Port A exponent pins drive the channel exponent bits.
Input Ports C and D form a pair to drive I and Q paths of the channel, respectively.
Input Port C exponent pins drive the channel exponent bits.
Internal PN sequence’s magnitude and exponent bits drive the channel.
Rev. A | Page 27 of 80
The amplitude of the sine and cosine are represented using
17 bits. The worst-case spurious signal from the NCO is better
than −100 dBc for all output frequencies.
Because the filtering in the AD6636 is low-pass filtering, the
carrier of interest is tuned down to dc (frequency = 0 Hz). This
is illustrated in Figure 30. Once the signal of interest is tuned
down to dc, the unwanted adjacent carriers can be rejected
using the low-pass filtering that follows.
NCO Frequency
The NCO frequency value is given by the 32-bit twos
complement number entered in the NCO frequency register.
Frequencies between −CLK/2 and CLK/2 (CLK/2 excluded)
are represented using this frequency word:
The NCO frequency word can be calculated by
where:
NCO_FREQ is the 32-bit twos complement number represent-
ing the NCO frequency register.
f
f
mod( ) is a remainder function. For example, mod(110, 100) =
10 and, for negative numbers, mod(−32, 10) = −2.
Note that this equation applies to the aliasing of signals in the
digital domain (that is, aliasing introduced when digitizing
analog signals).
ch
clk
0x8000 0000 represents a frequency given by −CLK/2.
0x0000 0000 represents dc (frequency is 0 Hz).
0x7FFF FFFF represents CLK/2 − CLK/2
is the desired carrier frequency.
is the clock rate for the channel under consideration.
NCO_FREQ
=
2
32
mod
(
f
f
ch
clk
,
f
clk
)
32
.
AD6636

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