AD6636CBCZ Analog Devices Inc, AD6636CBCZ Datasheet - Page 72

• Manufacturer Part Number: AD6636CBCZ
• Description: IC DIGITAL DWNCONV 4CH 256CSPBGA
• Manufacturer: Analog Devices Inc
• Series: AD6636r

Specifications of AD6636CBCZ

• Rf Type: Cellular, CDMA2000, EDGE, GPRS, GSM
• Number Of Mixers: 1
• Secondary Attributes: Down Converter
• Current - Supply: 450mA
• Voltage - Supply: 3 V ~ 3.6 V
• Package / Case: 256-CSPBGA
• Brief Features: 4/6 Independent Wideband Processing Channel, Quadrature Correction & DC Correction For Complex Input
• Supply Voltage Range: 1.7V To 1.9V
• Operating Temperature Range: -40°C To +85°C
• Ic Function: Digital Down Converter (DDC)
• Rohs Compliant: Yes
• Pin Count: 256
• Screening Level: Industrial
• Package Type: CSPBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Frequency: -
• Gain: -
• Noise Figure: -
• Lead Free Status / Rohs Status: Compliant

AD6636
<7:5>: AGC Word Length Control Bits. These bits define the
word length of the AGC output. The output word can be 4 bits
to 8 bits, 10 bits, 12 bits, or 16 bits wide. Table 42 shows the
possible selections.
Table 42. AGC Word Length Control Bits
AGC Control Bits <7:5>
000
001
010
011
100
101
110
111
<4>: AGC Mode Bit. When this bit is cleared, the AGC operates
to maintain a desired signal level. When this bit is set, it
operates to maintain a constant clipping level. See the
Automatic Gain Control section for details about these modes.
<3>: AGC Sync Now Bit. This bit is used to synchronize a
particular AGC irrespective of the channel through the
programming ports (microport or serial port). When this bit is
set, the AGC block updates a new output sample (RSSI sample)
and starts working toward a new update sample.
<2>: Initialize on Sync Bit. This bit is used to determine
whether or not the AGC should initialize on a sync. When this
bit is set during a synchronization, the CIC filter is cleared and
new values for CIC decimation, number of averaging samples,
CIC scale, signal gain K, and pole parameter P are loaded.
When Bit <2> = 0, the above-mentioned parameters are not
updated, and the CIC filter is not cleared. In both cases, an
AGC update sample is output from the CIC filter, and the
decimator starts operating toward the next output sample
whenever a sync occurs.
<1>: First Sync Only. This bit is used to ignore repetitive
synchronization signals. In some applications, the synchroniza-
tion signal occurs periodically. If this bit is cleared, each
synchronization request resynchronizes the AGC. If this bit is
set, only the first occurrence causes the AGC to synchronize
and updates the AGC gain values periodically, depending on
the decimation factor of the AGC CIC filter.
<0>: AGC Bypass Bit. When this bit is set, the AGC section is
bypassed. The N-bit representation from the interpolating half-
band filters is still reduced to a lower bit width representation as
set by Bits <7:5> of the AGC control register. A truncation at
the output of the AGC accomplishes this task.
Output Word Length (Bits)
16
12
10
8
7
6
5
4
Rev. A | Page 72 of 80
AGC Hold-Off Register <15:0>
The AGC hold-off counter is loaded with the value written to
this address when either a soft sync or pin sync comes into the
channel. The counter begins counting down. When it reaches 1,
a sync is sent to the AGC. This sync may or may not initialize
the AGC, as defined by the control word. The AGC loop is
updated with a new sample from the CIC filter whenever a sync
occurs. If this register is Logic 1, the AGC is updated
immediately when the sync occurs. If this register is Logic 0, the
AGC cannot be synchronized.
AGC Update Decimation <11:0>
This 12-bit register sets the AGC decimation ratio from 1 to
4096. An appropriate scaling factor should be set to avoid loss
of bits. The decimation ratio is given by the decimal value of the
AGC update decimation<11:0> register contents plus 1, that is,
12’0x000 describes a decimation ratio of 1, and 12’0xFFF
describes a decimation ratio of 4096.
AGC Signal Gain <11:0>
This register is used to set the initial value for a signal gain used
in the gain multiplier. This 12-bit value sets the initial signal
gain in the range of 0 dB and 96.296 dB in steps of 0.024 dB.
Initial signal gain (SG) in dB should be converted to a register
setting by
AGC Error Threshold <11:0>
This 12-bit register is the comparison value used to determine
which loop gain value (K
When the magnitude-of-error signal is less than the AGC error
threshold value, then K
format of the AGC error threshold register is four bits to the left
of the binary point and eight bits to the right. See the Automatic
Gain Control section for details.
AGC Average Samples <5:0>
This 6-bit register contains the scale used for the CIC filter and
the number of power samples to be averaged before being sent
to the CIC filter.
<5:2>: CIC Scale. This 4-bit word defines the scale used for the
CIC filter. Each increment of this word increases the CIC scale
by 6.02 dB.
Register Value = round
Register Value = round
1
is used; otherwise, K
1
or K
⎡
⎢
⎣
⎡
⎢
⎣
20
Error
2
) to use for optimum operation.
20
log
SG
log
Threshold
10
(
10
) 2
(
) 2
×256
2
× 256
⎤
⎥
⎦
is used. The word
⎤
⎥
⎦