AD6636CBCZ Analog Devices Inc, AD6636CBCZ Datasheet - Page 58

• Manufacturer Part Number: AD6636CBCZ
• Description: IC DIGITAL DWNCONV 4CH 256CSPBGA
• Manufacturer: Analog Devices Inc
• Series: AD6636r

Specifications of AD6636CBCZ

• Rf Type: Cellular, CDMA2000, EDGE, GPRS, GSM
• Number Of Mixers: 1
• Secondary Attributes: Down Converter
• Current - Supply: 450mA
• Voltage - Supply: 3 V ~ 3.6 V
• Package / Case: 256-CSPBGA
• Brief Features: 4/6 Independent Wideband Processing Channel, Quadrature Correction & DC Correction For Complex Input
• Supply Voltage Range: 1.7V To 1.9V
• Operating Temperature Range: -40°C To +85°C
• Ic Function: Digital Down Converter (DDC)
• Rohs Compliant: Yes
• Pin Count: 256
• Screening Level: Industrial
• Package Type: CSPBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Frequency: -
• Gain: -
• Noise Figure: -
• Lead Free Status / Rohs Status: Compliant

AD6636
Connecting the AD6654 Serial Port to a Blackfin DSP
In SPI mode, the Blackfin® DSP must act as a master to the
AD6636 by providing the SCLK. SDO is an open-drain output,
so that multiple slave devices can be connected together.
Figure 56 shows a typical connection.
In SPORT mode, the Blackfin provides the SCLK, SRFS, and
STFS signals, as shown in Figure 57.
MICROPORT
The microport on the AD6636 can be used for programming
the part, reading register values, and reading output data (I, Q,
and RSSI words).
Note that, at any given point in time, either the microport or the
serial port can be active, but not both. Some of the balls on the
package are shared between the microport and the serial port
and have dual functionality based on the SMODE pin. The
microport is selected by pulling the SMODE pin low (ground).
Both read and write operations can be performed using the
microport. The direct addressing scheme is used and any
internal register can be accessed using an 8-bit address. The
data bus can be either 8-bit or 16-bit as set by the chip I/O
access control register. Microport operation is synchronous to
CPUCLK, which must be supplied external to the AD6636 part.
CPUCLK should be less than CLKA and 100 MHz.
The microport can operate in Intel® mode (separate read and
write strobes) or in Motorola mode (single read/write strobe).
The MODE pin is used to select between Intel (INM, MODE = 0)
and Motorola (MNM, MODE = 1) modes. Some AD6636 pins
have dual functionality based on the MODE pin. Table 27 lists
the pin functions for both modes.
BLACKfin
BLACKfin
(MASTER)
Figure 56. SPI Mode Serial Port Connection to Blackfin DSP
Figure 57. SPORT Mode Serial Port Connections to Blackfin
SCK
SPISS
MOSI
MISO
PF2
PROGRAMMABLE FLAG
SCK
TFS
RFS
DT
DR
PF2
PROGRAMMABLE FLAG
MODE
MODE
SCLK
SRFS
SCLK
SRFS
STFS
STFS
AND
SDO
SDO
SCS
SCS
SDI
SDI
AD6636
AD6636
(SLAVE)
SMODE
SMODE
VDDIO
GND
VDDIO
GND
Rev. A | Page 58 of 80
Table 27. Microport Programming Pins
Mnemonic
RESET
SMODE
MODE
A[7:0]
D[15:0]
R/W (WR)
DS (RD)
DTACK (RDY)
CS
Intel (INM) Mode
The programming port performs synchronous Intel-style reads
and writes on the positive edge of the CPUCLK input when
RESET is inactive (active low signal). The CPUCLK pin is
driven by the programming device (CPUCLK of DSP or
FPGA). During a write access, the A[7:0] address bus provides
the address for access, and the D[15:0] bus (D[7:0] if the 8-bit
data bus is used) is driven by the programming device. The data
bus is driven by the AD6636 during a read operation. Intel
mode uses separate read ( RD ) and write ( WR ) active-low data
strobes to indicate both the type of access and the valid data for
that access.
The chip select ( CS ) is an active-low input that signals when an
access is active on its programming port pins. During an access,
the AD6636 drives RDY low to indicate that it is performing the
access. When the internal read or write access is complete, the
RDY pin is pulled high. Because the RDY pin is an open-drain
output with a weak internal pull-up resistor (70 kΩ), an
external pull-up resistor is recommended (see Figure 58).
Figure 13 and Figure 14 are the timing diagrams for read and
write cycles using the microport in INM mode. Do not read or
write, to or from, addresses beyond those defined by the
memory map (Address 0xE8 to Address 0xFF). Attempting to
access these addresses causes the bus to hang because RDY does
not go high to signal the end of the access.
For an asynchronous write operation in Intel (INM) mode, the
CPUCLK should be running. Set up the data and address buses.
Pull the WR signal low and then pull the CS signal low. The
RDY goes low to indicate that the access is taking place
internally. When RDY goes high, the write cycle is complete and
CS can be pulled high to disable the microport.
For an asynchronous read operation on the Intel mode
microport, set up the address bus and three-state the data bus.
Pull the RD signal low and then pull the CS signal low. The
RDY goes low to indicate an internal access. When RDY goes
high, valid data is available on the data bus for read.
Intel Mode
RESET
Logic 0
Logic 0
A[7:0]
D[15:0]
WR
RD
RDY
CS
Motorola Mode
RESET
Logic 0
Logic 1
A[7:0]
D[15:0]
R/W
DS
DTACK
CS