XC2VP7-5FFG896I

Manufacturer Part NumberXC2VP7-5FFG896I
DescriptionIC FPGA VIRTEX-II PRO 896-FBGA
ManufacturerXilinx Inc
SeriesVirtex™-II Pro
XC2VP7-5FFG896I datasheet
 

Specifications of XC2VP7-5FFG896I

Number Of Logic Elements/cells11088Number Of Labs/clbs1232
Total Ram Bits811008Number Of I /o396
Voltage - Supply1.425 V ~ 1.575 VMounting TypeSurface Mount
Operating Temperature-40°C ~ 100°CPackage / Case896-BBGA, FCBGA
Lead Free Status / RoHS StatusLead free / RoHS CompliantNumber Of Gates-
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R
3-State Buffers
Introduction
Each Virtex-II Pro CLB contains two 3-state drivers
(TBUFs) that can drive on-chip buses. Each 3-state buffer
has its own 3-state control pin and its own input pin.
Each of the four slices have access to the two 3-state buff-
ers through the switch matrix, as shown in
TBUFs in neighboring CLBs can access slice outputs by
direct connects. The outputs of the 3-state buffers drive hor-
izontal routing resources used to implement 3-state buses.
TBUF
TBUF
Switch
Matrix
Slice
S1
Slice
S0
Figure 45: Virtex-II Pro 3-State Buffers
The 3-state buffer logic is implemented using AND-OR logic
rather than 3-state drivers, so that timing is more predict-
able and less load dependant especially with larger devices.
Switch
matrix
CLB-II
Figure 46: 3-State Buffer Connection to Horizontal Lines
DS083 (v4.7) November 5, 2007
Product Specification
Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Functional Description
Locations / Organization
Four horizontal routing resources per CLB are provided for
on-chip 3-state buses. Each 3-state buffer has access alter-
nately to two horizontal lines, which can be partitioned as
shown in
SelectRAM+ memory and multiplier or I/O blocks are
skipped.
Figure
45.
Number of 3-State Buffers
Table 18
each Virtex-II Pro device. The number of 3-state buffers is
twice the number of CLB elements.
Table 18: Virtex-II Pro 3-State Buffers
Device
Slice
S3
XC2VP2
Slice
XC2VP4
S2
XC2VP7
XC2VP20
XC2VPX20
XC2VP30
DS031_37_060700
XC2VP40
XC2VP50
XC2VP70
XC2VPX70
XC2VP100
Programmable
Switch
connection
matrix
CLB-II
www.xilinx.com
Figure
46. The switch matrices corresponding to
shows the number of 3-state buffers available in
3-State Buffers
Total Number
per Row
of 3-State Buffers
44
44
68
92
92
92
116
140
164
164
188
3 - state lines
DS031_09_032700
704
1,504
2,464
4,640
4,896
6,848
9,696
11,808
16,544
16,544
22,048
Module 2 of 4
43