XC2VP7-5FFG896I Xilinx Inc, XC2VP7-5FFG896I Datasheet - Page 94

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XC2VP7-5FFG896I

Manufacturer Part Number
XC2VP7-5FFG896I
Description
IC FPGA VIRTEX-II PRO 896-FBGA
Manufacturer
Xilinx Inc
Series
Virtex™-II Pror
Datasheet

Specifications of XC2VP7-5FFG896I

Number Of Logic Elements/cells
11088
Number Of Labs/clbs
1232
Total Ram Bits
811008
Number Of I /o
396
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
896-BBGA, FCBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
R
Virtex-II Pro and Virtex-II Pro X Platform FPGAs: DC and Switching Characteristics
IOB Input Switching Characteristics Standard Adjustments
Table 33
gives all standard-specific data input delay adjustments.
Table 33: IOB Input Switching Characteristics Standard Adjustments
Description
LVTTL (Low-Voltage Transistor-Transistor Logic)
LVCMOS (Low-Voltage CMOS ), 3.3V
LVCMOS, 2.5V
LVCMOS, 1.8V
LVCMOS, 1.5V
LVDS (Low-Voltage Differential Signaling), 2.5V
LVDSEXT (LVDS Extended Mode), 2.5V
ULVDS (Ultra LVDS), 2.5V
BLVDS (Bus LVDS), 2.5V
LDT (HyperTransport), 2.5V
LVPECL (Low-Voltage Positive Electron-Coupled Logic), 2.5V
PCI (Peripheral Component Interface), 33 MHz, 3.3V
PCI, 66 MHz, 3.3V
PCI-X, 133 MHz, 3.3V
GTL (Gunning Transceiver Logic)
GTL Plus
HSTL (High-Speed Transceiver Logic), Class I
HSTL, Class II
HSTL, Class III
HSTL, Class IV
HSTL, Class I, 1.8V
HSTL, Class II, 1.8V
HSTL, Class III, 1.8V
HSTL, Class IV, 1.8V
SSTL (Stub Series Terminated Logic), Class I, 1.8V
SSTL, Class II, 1.8V
SSTL, Class I, 2.5V
SSTL, Class II, 2.5V
LVDCI (Low-Voltage Digitally Controlled Impedance), 3.3V
LVDCI, 2.5V
LVDCI, 1.8V
LVDCI, 1.5V
LVDCI, 2.5V, Half-Impedance
LVDCI, 1.8V, Half-Impedance
LVDCI, 1.5V, Half-Impedance
HSLVDCI (High-Speed Low-Voltage DCI), 1.5V
DS083 (v4.7) November 5, 2007
Product Specification
IOSTANDARD
Timing
Attribute
Parameter
LVTTL
T
ILVTTL
LVCMOS33
T
ILVCMOS33
LVCMOS25
T
ILVCMOS25
LVCMOS18
T
ILVCMOS18
LVCMOS15
T
ILVCMOS15
LVDS_25
T
ILVDS_25
T
LVDSEXT_25
ILVDSEXT_25
ULVDS_25
T
IULVDS_25
T
BLVDS_25
IBLVDS_25
T
LDT_25
ILDT_25
LVPECL_25
T
ILVPECL_25
PCI33_3
T
IPCI33_3
PCI66_3
T
IPCI66_3
PCIX
T
IPCIX
GTL
T
IGTL
GTLP
T
IGTLP
HSTL_I
T
IHSTL_I
HSTL_II
T
IHSTL_II
HSTL_III
T
IHSTL_III
HSTL_IV
T
IHSTL_IV
HSTL_I_18
T
IHSTL_I_18
HSTL_II_18
T
IHSTL_II_18
HSTL_III_18
T
IHSTL_III_18
HSTL_IV_18
T
IHSTL_IV_18
T
SSTL18_I
ISSTL18_I
T
SSTL18_II
ISSTL18_II
SSTL2_I
T
ISSTL2_I
SSTL2_II
T
ISSTL2_II
LVDCI_33
T
ILVDCI_33
LVDCI_25
T
ILVDCI_25
LVDCI_18
T
ILVDCI_18
LVDCI_15
T
ILVDCI_15
LVDCI_DV2_25
T
ILVDCI_DV2_25
LVDCI_DV2_18
T
ILVDCI_DV2_18
LVDCI_DV2_15
T
ILVDCI_DV2_15
HSLVDCI_15
T
IHSLVDCI_15
www.xilinx.com
Speed Grade
-7
-6
-5
Units
0.07
0.08
0.09
ns
0.04
0.05
0.05
ns
0.00
0.00
0.00
ns
0.29
0.33
0.36
ns
0.36
0.41
0.45
ns
0.31
0.36
0.40
ns
0.33
0.37
0.41
ns
0.31
0.36
0.40
ns
0.00
0.00
0.00
ns
0.31
0.36
0.40
ns
0.69
0.80
0.88
ns
0.14
0.16
0.18
ns
0.15
0.17
0.19
ns
0.12
0.13
0.15
ns
0.59
0.68
0.74
ns
0.63
0.72
0.79
ns
0.59
0.68
0.75
ns
0.59
0.68
0.75
ns
0.57
0.66
0.72
ns
0.58
0.67
0.74
ns
0.57
0.65
0.72
ns
0.55
0.63
0.69
ns
0.56
0.64
0.70
ns
0.57
0.65
0.71
ns
0.62
0.72
0.79
ns
0.64
0.73
0.81
ns
0.62
0.72
0.79
ns
0.64
0.73
0.81
ns
–0.05
–0.05
–0.06
ns
0.00
0.00
0.00
ns
0.07
0.09
0.09
ns
0.13
0.15
0.17
ns
0.00
0.00
0.00
ns
0.07
0.09
0.09
ns
0.13
0.15
0.17
ns
0.59
0.68
0.75
ns
Module 3 of 4
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