pef22504 Infineon Technologies Corporation, pef22504 Datasheet - Page 113

• Manufacturer Part Number: pef22504
• Description: Quad E1/t1/j1 Line Interface Component For Long- And Short-haul Applications Pef 22504 E, Pef 22504 Ht, Version 2.1
• Manufacturer: Infineon Technologies Corporation

3.11.4
The local loop-back is activated by
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•
The local loop-back mode disconnects the receive lines RL1/2 or ROID from the receiver. Instead of the signals
coming from the line the data provided by the framer interface is routed through the analog receiver back to the
framer interface. However, the bit stream is transmitted undisturbed on the line at XL1/2. However, an AIS to the
distant end can be enabled by setting MR1.XAIS = ´1´ without influencing the data looped back to the framer
interface.
The signal codes for transmitter and receiver have to be identical.
Figure 44
3.11.5
The payload loop-back is activated by setting MR2.PLB (MR2).
During activated payload loop-back the data stream is looped from the receiver section back to transmitter section.
The looped data passes the complete receiver including the wander and jitter compensation in the receive elastic
buffer and is output on pin RDO. Instead of the data an AIS signal (MR2.SAIS) can be sent to the framer interface.
If the PLB is enabled the transmitter and the data on pins XL1/2 or XDOP/XDON are clocked with FCLKR instead
of FCLKX. All the received data is processed normally.
Data Sheet
The control bit LIM0.LL (LIM0).
After detection of the appropriate In-band loop code, if enabled by ALS.SILS, see
RL1/ROID
Receive Line
Interface
Transmit Line
Interface
RL2
XL3
XL1
XL2
XL4
Local Loop
Local Loop
Payload Loop-Back
Equalizer
Local Loop
DAC
Shaper,
Pulse
LBO
Recovery
Clock &
Data
DPLL
113
Decoder
Encoder
A
H
Dual Transmit Elastic Buffer
Dual Receive Elastic Buffer
DCO-X
C
recovered
receive clock
DCO-R
G
Chapter
internal
receive clock
Functional Description
F
Rev. 1.3, 2006-01-25
internal
transmit
clock
D
J
3.11.2.
RDOP
RDON
RCLK
%
E
QuadLIU
PEF 22504
QLIU _loc al_loop
XDIP
XDIN
FCLKX
TCLK
TM