pef22504 Infineon Technologies Corporation, pef22504 Datasheet - Page 49

no-image

pef22504

Manufacturer Part Number
pef22504
Description
Quad E1/t1/j1 Line Interface Component For Long- And Short-haul Applications Pef 22504 E, Pef 22504 Ht, Version 2.1
Manufacturer
Infineon Technologies Corporation
Datasheet
Table 2
Pin No.
39
Data Sheet
Name
XL2.3
XDON3
XFM3
I/O Signals for P-TQFP-144-8 (cont’d)
Pin Type
O (analog) –
O
O
Buffer
Type
Function
Transmit Line 2, port 3
Analog output for the external transformer. Selected if
LIM1.DRS is cleared. After reset this pin is in high-
impedance state until bit FMR0.XC1 is set and XPM2.XLT is
cleared.
Transmit Data Output Negative, port 3
This digital output for transmitted dual-rail
PCM(-) route signals can provide
The data is clocked on positive transitions of XCLK3 in both
cases. Output polarity is selected by bit LIM0.XDOS (after
reset: active low).
The dual-rail mode is selected if LIM1.DRS and FMR0.XC1
are set. After reset this pin is in high-impedance state until
register LIM1.DRS is set and XPM2.XLT cleared.
Transmit Frame Marker, port 3
This digital output marks the first bit of every frame
transmitted on port XDOP. This function is only available in
the optical interface mode (LIM1.DRS = 1 and FMR0.XC1 =
0
reset this pin is in high-impedance state until register
LIM1.DRS is set and XPM2.XLT cleared.
In remote loop configuration the XFM3 marker is not valid.
B
). Data is clocked on positive transitions of XCLK3. After
49
Half bauded signals with 50% duty cycle (LIM0.XFB = 0
or
Full bauded signals with 100% duty cycle (LIM0.XFB =
1
B
)
Rev. 1.3, 2006-01-25
Pin Descriptions
QuadLIU
PEF 22504
TM
B
)

Related parts for pef22504