pef22504 Infineon Technologies Corporation, pef22504 Datasheet - Page 171

• Manufacturer Part Number: pef22504
• Description: Quad E1/t1/j1 Line Interface Component For Long- And Short-haul Applications Pef 22504 E, Pef 22504 Ht, Version 2.1
• Manufacturer: Infineon Technologies Corporation

Global Clock Mode Register 4
GCM4
Global Clock Mode Register 4
Field
DVM_T1
PHD_T1
Data Sheet
Bits
7:5
3:0
Type
rw
rw
Description
Divider Mode for T1
This bits can be write and read to be software compatible to QuadLIU, but
has no influence on the clock system
Frequency Adjust for T1
(highest 4 bits, for lower 8 bits see GCM3)
The 12 bit frequency adjust value is in the decimal range of -2048 to
+2047. Negative values are represented in 2s-complement format. For
details see calculation formulas in register
100000000000
...
000000000000
...
011111111111
B
B
Offset
0095
171
B
B
B
-2048
0
+2047
H
Register DescriptionGlobal Clock Mode Register 4
GCM6
and
Rev. 1.3, 2006-01-25
Table
QuadLIU
PEF 22504
Reset Value
49.
00
TM
H