pef22504 Infineon Technologies Corporation, pef22504 Datasheet - Page 70

• Manufacturer Part Number: pef22504
• Description: Quad E1/t1/j1 Line Interface Component For Long- And Short-haul Applications Pef 22504 E, Pef 22504 Ht, Version 2.1
• Manufacturer: Infineon Technologies Corporation

Figure 10
Figure 11
The following configurations of the SCI interface of the QuadLIU
command into the SCI configuration register (control bits ´10B´, see
Table 4
•
•
•
•
•
•
The following SCI configurations are fixed and cannot be set by the micro controller:
•
•
The maximum possible SCI clock frequency is 6 MHz for point to point applications (full duplex) and about 2 MHz
for multipoint to multipoint applications, dependent on the electrical capacity of the bus lines of the PCB.
Figure 12
communication. The HDLC flags mark beginning and end of all messages.
Data Sheet
Half duplex/full duplex (reset value: Half duplex), bit DUP.
OpenDrain/push-pull (configuration of output pin to openDrain/push-pull is in general independent of the
duplex mode and must be set appropriately in application) (reset value: open Drain), bit PP.
CRC for transmit and receive on/off (reset value: off), bit CRC_EN.
Automatic acknowledgement of CMD messages on/off (reset value: off), bit ACK_EN.
Clock edge rising/falling (reset value: falling), bit CLK_POL.
Clock gating (reset value: off), bit CLK_GAT.
Interrupt feature is disabled, bit INT_EN = ´0´.
Arbitration always made with LAPD (only SCI applications like in
ARB = ´0´.
and
shows the message structure of the QuadLIU
SCI Interface Application with Point To Point Connections
SCI Interface Application with Multipoint To Multipoint Connection
Figure
13):
Micro-processor
Interworking
Microprocessor
Device
Interworking
or
Device
or
TxData
RxData
TxData
RxData
TxData
RxData
Clk
Clk
Clk
Clk
70
IM(1:0)
IM(1:0)
IM(1:0)
Data
Data
Data
Clk
Clk
IM(1:0)
IM(1:0)
IM(1:0)
PP
TM
oD
SCI_TXD
SCI_RXD
. The SCI interface uses HDLC frames for
TM
SCI_TXD
SCI_RXD
QuadLIU
QuadLIU
QuadLIU
QuadLIU
Table
QuadLIU
QuadLIU
can be set by the micro controller by a write
Figure 10
9, SCI register address is ´0000H´, see
QLIU_SCI_halfduplex
and
QLIU-Interfaces_2
A(5:0)
A(5:0)
A(5:0)
Figure 11
Functional Description
Rev. 1.3, 2006-01-25
are possible), bit
QuadLIU
PEF 22504
TM