pef22504 Infineon Technologies Corporation, pef22504 Datasheet - Page 56

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pef22504

Manufacturer Part Number
pef22504
Description
Quad E1/t1/j1 Line Interface Component For Long- And Short-haul Applications Pef 22504 E, Pef 22504 Ht, Version 2.1
Manufacturer
Infineon Technologies Corporation
Datasheet
Table 2
Pin No.
4
5
6
7
4
5
6
7
4
5
6
7
4
5
6
7
Data Sheet
Name
RPA1
RPB1
RPC1
RPD1
RPA1
RPB1
RPC1
RPD1
RPA1
RPB1
RPC1
RPD1
RPA1
RPB1
RPC1
RPD1
I/O Signals for P-TQFP-144-8 (cont’d)
Pin Type
I
O
O
O
Buffer
Type
PU
Function
Synchronous Pulse Receive, port 1
SYPR, PC(1:4).RPC(3:0) = 0000
Together with the values of registers RC(1:0) this signal
defines the beginning of time slot 0 on system highway port
RDO.
Only one multifunction port may be selected as SYPR input.
After reset, SYPR of port A is used, the other lines are
ignored.
In system interface multiplex mode, SYPR has to be provided
at port RPA1 for four or all four channels dependent if 4:1 or
8:1 multiplex mode is selected. SYPR defines the beginning
of the time slot 0 on port RDO/RSIG.
The pulse cycle is an integer multiple of 125 s.
Receive Frame Marker (RFM), port 1
PC(1:4).RPC(3:0) = 0001
CMR2.IRSP = 0
The receive frame marker can be active high for a 2.048 MHz
(E1) or 1.544 MHz (T1/J1) period during any bit position of
the current frame. It is clocked off with the rising or falling
edge of SCLKR or RCLK, depending on SIC3.RESR. Offset
programming is done by using registers RC(1:0).
CMR2.IRSP = 1
Frame synchronization pulse generated by the DCO-R
circuitry internally. This pulse is active low for a 2.048 MHz
(E1) or 1.544 MHz (T1/J1) period.
Receive Multiframe Begin (RMFB), port 1
PC(1:4).RPC(3:0) = 0010
In E1 mode RMFB marks the beginning of every received
multiframe (RDO). Optionally the time slot 16 CAS
multiframe begin can be marked (SIC3.CASMF). Active high
for one 2.048 MHz period.
In T1/J1 mode the function depends on bit XC0.MFBS:
MFBS = 1
RMFB marks the beginning of every received multiframe
(RDO).
MFBS = 0
RMFB marks the beginning of every received superframe.
Additional pulses are provided every 12 frames when using
ESF/F24 or F72 format.
Receive Signaling Marker (RSIGM), port 1
PC(1:4).RPC(3:0) = 0011
E1: Marks the time slots which are defined by register
RTR(4:1) of every received frame on port RDO.
T1/J1: Marks the time slots which are defined by register
RTR(4:1) of every received frame on port RDO, if CAS-BR is
not used.
When using the CAS-BR signaling scheme, the robbed bit of
each channel every sixth frames is marked, if CAS-BR is
enabled by XC0.BRM = 1
56
B
B
B
B
B
B
B
B
.
B
Rev. 1.3, 2006-01-25
Pin Descriptions
QuadLIU
PEF 22504
TM

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