pef22504 Infineon Technologies Corporation, pef22504 Datasheet - Page 145

• Manufacturer Part Number: pef22504
• Description: Quad E1/t1/j1 Line Interface Component For Long- And Short-haul Applications Pef 22504 E, Pef 22504 Ht, Version 2.1
• Manufacturer: Infineon Technologies Corporation

Loop Code Register 2
LCR2
Loop Code Register 2
Field
LDC
Data Sheet
Bits
7:0
Type
rw
Description
Line Loop-Back Deactivate Code
If enabled by bit MR3.XLD = ´1´ in E1 or MR5.XLD = ´1´ in T1/J1 mode
the LLB deactivate code automatically repeats until the LLB generator is
stopped. Transmit data is overwritten by the LLB code. LDC0 is
transmitted last. For correct operations bit LCR1.XPRBS has to cleared.
If LCR2 is changed while the previous deactivate code has been detected
and is still received, bit LSR2.LLBDD in E1 or LSR1.LLBDD in T1/J1
mode will stay active until the incoming signal changes or a receiver reset
is initiated (CMDR.RRES = ´1´).
Offset
xx3C
145
H
Register DescriptionLoop Code Register 2
Rev. 1.3, 2006-01-25
QuadLIU
PEF 22504
Reset Value
00
TM
H