pef22504 Infineon Technologies Corporation, pef22504 Datasheet - Page 57
pef22504
Manufacturer Part Number
pef22504
Description
Quad E1/t1/j1 Line Interface Component For Long- And Short-haul Applications Pef 22504 E, Pef 22504 Ht, Version 2.1
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEF22504.pdf
(255 pages)
- Current page: 57 of 255
- Download datasheet (8Mb)
Table 2
Pin No.
4
5
6
7
4
5
6
7
4
5
6
7
4
5
6
7
4
5
6
7
4
5
6
7
4
5
6
7
Data Sheet
Name
RPA1
RPB1
RPC1
RPD1
RPA1
RPB1
RPC1
RPD1
RPA1
RPB1
RPC1
RPD1
RPA1
RPB1
RPC1
RPD1
RPA1
RPB1
RPC1
RPD1
RPA1
RPB1
RPC1
RPD1
RPA1
RPB1
RPC1
RPD1
I/O Signals for P-TQFP-144-8 (cont’d)
Pin Type
O
O
O
O
I
I
O
Buffer
Type
–
–
–
–
PU
PU
–
Function
Receive Signaling Data (RSIG), port 1
PC(1:4).RPC(3:0) = 0100
The received CAS signaling data is sourced by this pin. Time
slots on RSIG correlate directly to the time slot assignment
on RDO.
In 4:1 system interface multiplex mode four received signaing
data streams are merged into a single data stream
respectively which is transmitted on RPB1 (bit- or byte-
interleaved).
Data Link Bit Receive (DLR), port 1
PC(1:4).RPC(3:0) = 0101
E1: Marks the Sa(8:4)-bits within the data stream on RDO.
The Sa(8:4)-bit positions in time slot 0 of every frame not
containing the frame alignment signal are selected by
register XC0.
T1/J1: Marks the DL-bit position within the data stream on
RDO.
Freeze signaling (FREEZE), port 1
PC(1:4).RPC(3:0) = 0110
The freeze signaling status is set active high by detecting a
loss of signal alarm, a loss of CAS frame alignment or a
receive slip (positive or negative). It will stay high for at least
one complete multiframe after the alarm disappears. Setting
SIC2.FFS enforces a high on pin FREEZE.
Frame Synchronous Pulse (RFSP) , port 1
RFSP, PC(1:4).RPC(3:0) = 0111
Active low framing pulse derived from the received PCM
route signal (line side, RCLK). During loss of synchronization
(bit FRS0.LFA = 1
during alarm simulation).
Pulse frequency: 8 kHz
Pulse width: 488 ns (E1) or 648 ns (T1/J1).
Receive Line Termination (RLT), port 1
PC(1:4).RPC(3:0) = 1000
General Purpose Input (GPI), port 1
PC(1:4).RPC(3:0) = 1001
The pin is set to input. The state of this input is reflected in
the register bits MFPI.RPA, MFPI.RPB or MFPI.RPC
respectively.
General Purpose Output High (GPOH), port 1
PC(1:4).RPC(3:0) = 1010
The pin level is set fix to high level.
57
B
), this pulse is suppressed (not influenced
B
B
B
B
B
B
.
.
.
B
Rev. 1.3, 2006-01-25
Pin Descriptions
QuadLIU
PEF 22504
TM
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