pef22504 Infineon Technologies Corporation, pef22504 Datasheet - Page 121

• Manufacturer Part Number: pef22504
• Description: Quad E1/t1/j1 Line Interface Component For Long- And Short-haul Applications Pef 22504 E, Pef 22504 Ht, Version 2.1
• Manufacturer: Infineon Technologies Corporation

Interrupt Port Configuration
See
Note: Unused bits have to be cleared.
IPC
Interrupt Port Configuration
Field
VISPLL
SSYF
IC
Data Sheet
Chapter 3.5.3
Bits
7
2
1:0
and
Table
Type
rw
rw
rw
10.
Description
Masked PLL Interrupts Visible
See also
0
1
Select SYNC Frequency
Only applicable in master mode (LIM0.MAS = ´1´) and bit CMR2.DCF is
cleared, see also Table 9.
0
1
Interrupt Port Configuration
These bits define the function of the interrupt output pin INT.
X0
01
11
B
B
B
B
B
B
B
register GIS2.
but they are not visible in registers GIS.
Masked interrupt status bits PLLLC and PLLIC are visible in GIS2,
Masked interrupt status bits PLLLC and PLLIC are not visible in
Reference clock on port SYNC is 2.048 MHz
Reference clock on port SYNC is 8 kHz
Open drain output
Push/pull output, active low
Push/pull output, active high
Chapter 3.5.3
Offset
0008
121
H
Register DescriptionInterrupt Port Configuration
Rev. 1.3, 2006-01-25
QuadLIU
PEF 22504
Reset Value
00
TM
H