pef22504 Infineon Technologies Corporation, pef22504 Datasheet - Page 152

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pef22504

Manufacturer Part Number
pef22504
Description
Quad E1/t1/j1 Line Interface Component For Long- And Short-haul Applications Pef 22504 E, Pef 22504 Ht, Version 2.1
Manufacturer
Infineon Technologies Corporation
Datasheet
Clock Mode Register 5
Note: The reset value depends on the channel, so that for the DCO-R the current channel is selected by the bits
CMR5
Clock Mode Register 5
Field
DRSS
IAX
Data Sheet
DRSS (for example for channel 3 the reset value is ´40´
Bits
7:5
4:0
Type
rw
rw
Description
DCO-R Channel Selection
See
000
001
010
011
1xx
Integral Parameter Selection
(Corner frequency and attenuation selection) for the DCO-X
Only valid if CMR6.DCOCOMPN = ´1´ and CMR2.ECFAX = ´1´, see
Chapter
B
B
B
B
B
Chapter
receive reference clock generated by the DPLL of channel 1.
receive reference clock generated by the DPLL of channel 2.
receive reference clock generated by the DPLL of channel 3.
receive reference clock generated by the DPLL of channel 4.
reserved.
3.7.8.
Offset
xx42
3.7.
152
H
H
).
Register DescriptionClock Mode Register 5
Rev. 1.3, 2006-01-25
QuadLIU
PEF 22504
Reset Value
00
TM
H

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